linux/arch
Dave Jiang 232bb01bb8 x86/asm: add iosubmit_cmds512() based on MOVDIR64B CPU instruction
With the introduction of MOVDIR64B instruction, there is now an instruction
that can write 64 bytes of data atomically.

Quoting from Intel SDM:
"There is no atomicity guarantee provided for the 64-byte load operation
from source address, and processor implementations may use multiple
load operations to read the 64-bytes. The 64-byte direct-store issued
by MOVDIR64B guarantees 64-byte write-completion atomicity. This means
that the data arrives at the destination in a single undivided 64-byte
write transaction."

We have identified at least 3 different use cases for this instruction in
the format of func(dst, src, count):
1) Clear poison / Initialize MKTME memory
   @dst is normal memory.
   @src in normal memory. Does not increment. (Copy same line to all
   targets)
   @count (to clear/init multiple lines)
2) Submit command(s) to new devices
   @dst is a special MMIO region for a device. Does not increment.
   @src is normal memory. Increments.
   @count usually is 1, but can be multiple.
3) Copy to iomem in big chunks
   @dst is iomem and increments
   @src in normal memory and increments
   @count is number of chunks to copy

Add support for case #2 to support device that will accept commands via
this instruction. We provide a @count in order to submit a batch of
preprogrammed descriptors in virtually contiguous memory. This
allows the caller to submit multiple descriptors to a device with a single
submission. The special device requires the entire 64bytes descriptor to
be written atomically and will accept MOVDIR64B instruction.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/157965022175.73301.10174614665472962675.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-01-24 11:18:45 +05:30
..
alpha alpha: use pgtable-nopud instead of 4level-fixup 2019-12-04 19:44:14 -08:00
arc ARC updates for 5.5-rc1 2019-12-04 19:06:18 -08:00
arm ARM fixes for 5.5-rc: 2019-12-06 16:12:39 -08:00
arm64 ARM: SoC fixes 2019-12-06 14:19:37 -08:00
c6x c6x: use pgtable-nopud instead of 4level-fixup 2019-12-04 19:44:15 -08:00
csky dma-mapping updates for 5.5-rc1 2019-11-28 11:16:43 -08:00
h8300 h8300: Move EXCEPTION_TABLE to RO_DATA segment 2019-11-04 18:12:55 +01:00
hexagon Kbuild updates for v5.5 2019-12-02 17:35:04 -08:00
ia64 drm msm + fixes for 5.5-rc1 2019-12-06 10:28:09 -08:00
m68k Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu 2019-12-05 12:20:42 -08:00
microblaze microblaze: use pgtable-nopmd instead of 4level-fixup 2019-12-04 19:44:15 -08:00
mips arch: sembuf.h: make uapi asm/sembuf.h self-contained 2019-12-04 19:44:14 -08:00
nds32 nds32: use pgtable-nopmd instead of 4level-fixup 2019-12-04 19:44:15 -08:00
nios2 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace 2019-12-01 13:26:18 -08:00
openrisc OpenRISC updates for 5.5 2019-12-02 17:18:43 -08:00
parisc parisc/hugetlb: use pgtable-nopXd instead of 4level-fixup 2019-12-04 19:44:15 -08:00
powerpc powerpc updates for 5.5 #2 2019-12-06 13:36:31 -08:00
riscv Second set of RISC-V updates for v5.5-rc1 2019-12-04 11:07:00 -08:00
s390 powerpc updates for 5.5 #2 2019-12-06 13:36:31 -08:00
sh Additional power management updates for 5.5-rc1 2019-12-04 10:48:09 -08:00
sparc sparc32: use pgtable-nopud instead of 4level-fixup 2019-12-04 19:44:15 -08:00
um um: add support for folded p4d page tables 2019-12-04 19:44:15 -08:00
unicore32 generic ioremap support 2019-11-28 10:57:12 -08:00
x86 x86/asm: add iosubmit_cmds512() based on MOVDIR64B CPU instruction 2020-01-24 11:18:45 +05:30
xtensa arch: sembuf.h: make uapi asm/sembuf.h self-contained 2019-12-04 19:44:14 -08:00
.gitignore
Kconfig arch/Kconfig: fix indentation 2019-12-04 19:44:12 -08:00