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riscv: Add support for non-coherent devices using zicbom extension

The Zicbom ISA-extension was ratified in november 2021
and introduces instructions for dcache invalidate, clean
and flush operations.

Implement cache management operations for non-coherent devices
based on them.

Of course not all cores will support this, so implement an
alternative-based mechanism that replaces empty instructions
with ones done around Zicbom instructions.

As discussed in previous versions, assume the platform
being coherent by default so that non-coherent devices need
to get marked accordingly by firmware.

Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Guo Ren <guoren@kernel.org>
Link: https://lore.kernel.org/r/20220706231536.2041855-4-heiko@sntech.de
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

2022-07-28 15:30:51 -07:00

cacheflush.c

RISC-V: Do not use cpumask data structure for hartid bitmap

2022-01-20 09:27:22 -08:00

context.c

riscv: Implement sv48 support

2022-01-19 17:54:09 -08:00

dma-noncoherent.c

riscv: Add support for non-coherent devices using zicbom extension

2022-07-28 15:30:51 -07:00

extable.c

riscv: extable: fix err reg writing in dedicated uaccess handler