Mayuresh Chitale d21b5d342f RISC-V: KVM: Enable Smstateen accesses ...

Configure hstateen0 register so that the AIA state and envcfg are
accessible to the vcpus. This includes registers such as siselect,
sireg, siph, sieh and all the IMISC registers.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>

2023-10-12 18:44:07 +05:30

..

asm

RISC-V: KVM: Enable Smstateen accesses

2023-10-12 18:44:07 +05:30