Markos Chandras d2e6d30ad1 MIPS: mm: page: Add MIPS R6 support
The MIPS R6 pref instruction only has 9 bits for the immediate
field so skip the micro-assembler PREF instruction if the offset
does not fit in 9 bits. Moreover, bit 30 (Pref_PrepareForStore) is
no longer valid in MIPS R6, so we change the default for all MIPS R6
processors to bit 5 (Pref_StoreStreamed).

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:30 +00:00
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2014-12-18 16:26:41 -08:00
2015-02-17 15:37:30 +00:00
2014-12-31 11:04:58 +08:00
2014-12-19 22:55:06 +01:00
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