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Uses the FADT-defined reset register and reset value. Checks the
FADT flags for the reset register supported bit. Supports reset
register in memory or I/O space, but not in PCI config space
since the host has the information to do it.
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
d3fd902d1e