Add support for Socionext Synquacer SDHCI. This binding has been in use for some time. The interrupts were not documented. The driver only uses the first interrupt, but the DT and example have 2 interrupts. The 2nd one is unknown. "dma-coherent" was also not documented, but is used on Synquacer. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/20230319173006.30455-1-robh@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
67 lines
1.3 KiB
YAML
67 lines
1.3 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/mmc/fujitsu,sdhci-fujitsu.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Fujitsu/Socionext SDHCI controller (F_SDH30)
|
|
|
|
maintainers:
|
|
- Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
|
|
|
|
allOf:
|
|
- $ref: mmc-controller.yaml#
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- items:
|
|
- const: socionext,synquacer-sdhci
|
|
- const: fujitsu,mb86s70-sdhci-3.0
|
|
- enum:
|
|
- fujitsu,mb86s70-sdhci-3.0
|
|
- socionext,f-sdh30-e51-mmc
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
maxItems: 2
|
|
|
|
clock-names:
|
|
items:
|
|
- const: iface
|
|
- const: core
|
|
|
|
dma-coherent: true
|
|
|
|
interrupts:
|
|
maxItems: 2
|
|
|
|
resets:
|
|
maxItems: 1
|
|
|
|
fujitsu,cmd-dat-delay-select:
|
|
type: boolean
|
|
description: |
|
|
Indicating that this host requires the CMD_DAT_DELAY control to be enabled
|
|
|
|
unevaluatedProperties: false
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- clocks
|
|
- clock-names
|
|
|
|
examples:
|
|
- |
|
|
sdhci1: mmc@36600000 {
|
|
compatible = "fujitsu,mb86s70-sdhci-3.0";
|
|
reg = <0x36600000 0x1000>;
|
|
bus-width = <4>;
|
|
vqmmc-supply = <&vccq_sdhci1>;
|
|
clocks = <&clock 2 2 0>, <&clock 2 3 0>;
|
|
clock-names = "iface", "core";
|
|
};
|