5bc08e1921
Apparently the Flatiron genereates an interrupt after the built-in self test for each of its left and right channels has completed. Apparently Conexant wire-OR'ed the Flatiron's interrupt output with the interrupt output of the CX23885 A/V core. Those interrupts need to be handled, otherwise, they generate an interrrupt request storm. So: - Add flatiron readreg and writereg functions prototypes on a new header file; - Modify the av interrupt handler to cleanup flatiron IRQs if no other interrupt handling happens. Signed-off-by: Luis Alves <ljalvs@gmail.com> Acked-by: Andy Walls <awalls@md.metrocast.net> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
50 lines
1.6 KiB
C
50 lines
1.6 KiB
C
/*
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* Driver for the Conexant CX23885/7/8 PCIe bridge
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*
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* AV device support routines - non-input, non-vl42_subdev routines
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*
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* Copyright (C) 2010 Andy Walls <awalls@md.metrocast.net>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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#include "cx23885.h"
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#include "cx23885-av.h"
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#include "cx23885-video.h"
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void cx23885_av_work_handler(struct work_struct *work)
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{
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struct cx23885_dev *dev =
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container_of(work, struct cx23885_dev, cx25840_work);
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bool handled;
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v4l2_subdev_call(dev->sd_cx25840, core, interrupt_service_routine,
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PCI_MSK_AV_CORE, &handled);
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/* Getting here with the interrupt not handled
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then probbaly flatiron does have pending interrupts.
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*/
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if (!handled) {
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/* clear left and right adc channel interrupt request flag */
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cx23885_flatiron_write(dev, 0x1f,
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cx23885_flatiron_read(dev, 0x1f) | 0x80);
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cx23885_flatiron_write(dev, 0x23,
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cx23885_flatiron_read(dev, 0x23) | 0x80);
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}
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cx23885_irq_enable(dev, PCI_MSK_AV_CORE);
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}
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