fadaed3023
This patch syncs naming rule. - xxx_rates; + xxx_rate; - xxx_samplebits; + xxx_sample_bits; Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87mtxaolhz.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
627 lines
14 KiB
C
627 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Rockchip PDM ALSA SoC Digital Audio Interface(DAI) driver
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*
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* Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd
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*/
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/rational.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/pcm_params.h>
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#include "rockchip_pdm.h"
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#define PDM_DMA_BURST_SIZE (8) /* size * width: 8*4 = 32 bytes */
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#define PDM_SIGNOFF_CLK_RATE (100000000)
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enum rk_pdm_version {
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RK_PDM_RK3229,
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RK_PDM_RK3308,
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};
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struct rk_pdm_dev {
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struct device *dev;
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struct clk *clk;
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struct clk *hclk;
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struct regmap *regmap;
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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struct reset_control *reset;
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enum rk_pdm_version version;
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};
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struct rk_pdm_clkref {
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unsigned int sr;
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unsigned int clk;
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unsigned int clk_out;
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};
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struct rk_pdm_ds_ratio {
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unsigned int ratio;
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unsigned int sr;
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};
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static struct rk_pdm_clkref clkref[] = {
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{ 8000, 40960000, 2048000 },
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{ 11025, 56448000, 2822400 },
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{ 12000, 61440000, 3072000 },
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{ 8000, 98304000, 2048000 },
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{ 12000, 98304000, 3072000 },
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};
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static struct rk_pdm_ds_ratio ds_ratio[] = {
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{ 0, 192000 },
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{ 0, 176400 },
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{ 0, 128000 },
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{ 1, 96000 },
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{ 1, 88200 },
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{ 1, 64000 },
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{ 2, 48000 },
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{ 2, 44100 },
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{ 2, 32000 },
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{ 3, 24000 },
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{ 3, 22050 },
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{ 3, 16000 },
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{ 4, 12000 },
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{ 4, 11025 },
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{ 4, 8000 },
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};
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static unsigned int get_pdm_clk(struct rk_pdm_dev *pdm, unsigned int sr,
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unsigned int *clk_src, unsigned int *clk_out)
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{
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unsigned int i, count, clk, div, rate;
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clk = 0;
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if (!sr)
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return clk;
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count = ARRAY_SIZE(clkref);
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for (i = 0; i < count; i++) {
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if (sr % clkref[i].sr)
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continue;
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div = sr / clkref[i].sr;
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if ((div & (div - 1)) == 0) {
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*clk_out = clkref[i].clk_out;
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rate = clk_round_rate(pdm->clk, clkref[i].clk);
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if (rate != clkref[i].clk)
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continue;
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clk = clkref[i].clk;
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*clk_src = clkref[i].clk;
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break;
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}
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}
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if (!clk) {
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clk = clk_round_rate(pdm->clk, PDM_SIGNOFF_CLK_RATE);
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*clk_src = clk;
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}
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return clk;
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}
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static unsigned int get_pdm_ds_ratio(unsigned int sr)
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{
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unsigned int i, count, ratio;
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ratio = 0;
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if (!sr)
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return ratio;
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count = ARRAY_SIZE(ds_ratio);
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for (i = 0; i < count; i++) {
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if (sr == ds_ratio[i].sr)
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ratio = ds_ratio[i].ratio;
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}
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return ratio;
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}
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static inline struct rk_pdm_dev *to_info(struct snd_soc_dai *dai)
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{
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return snd_soc_dai_get_drvdata(dai);
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}
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static void rockchip_pdm_rxctrl(struct rk_pdm_dev *pdm, int on)
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{
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if (on) {
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regmap_update_bits(pdm->regmap, PDM_DMA_CTRL,
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PDM_DMA_RD_MSK, PDM_DMA_RD_EN);
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regmap_update_bits(pdm->regmap, PDM_SYSCONFIG,
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PDM_RX_MASK, PDM_RX_START);
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} else {
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regmap_update_bits(pdm->regmap, PDM_DMA_CTRL,
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PDM_DMA_RD_MSK, PDM_DMA_RD_DIS);
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regmap_update_bits(pdm->regmap, PDM_SYSCONFIG,
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PDM_RX_MASK | PDM_RX_CLR_MASK,
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PDM_RX_STOP | PDM_RX_CLR_WR);
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}
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}
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static int rockchip_pdm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct rk_pdm_dev *pdm = to_info(dai);
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unsigned int val = 0;
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unsigned int clk_rate, clk_div, samplerate;
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unsigned int clk_src, clk_out = 0;
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unsigned long m, n;
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bool change;
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int ret;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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return 0;
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samplerate = params_rate(params);
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clk_rate = get_pdm_clk(pdm, samplerate, &clk_src, &clk_out);
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if (!clk_rate)
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return -EINVAL;
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ret = clk_set_rate(pdm->clk, clk_src);
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if (ret)
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return -EINVAL;
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if (pdm->version == RK_PDM_RK3308) {
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rational_best_approximation(clk_out, clk_src,
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GENMASK(16 - 1, 0),
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GENMASK(16 - 1, 0),
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&m, &n);
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val = (m << PDM_FD_NUMERATOR_SFT) |
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(n << PDM_FD_DENOMINATOR_SFT);
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regmap_update_bits_check(pdm->regmap, PDM_CTRL1,
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PDM_FD_NUMERATOR_MSK |
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PDM_FD_DENOMINATOR_MSK,
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val, &change);
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if (change) {
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reset_control_assert(pdm->reset);
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reset_control_deassert(pdm->reset);
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rockchip_pdm_rxctrl(pdm, 0);
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}
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clk_div = n / m;
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if (clk_div >= 40)
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val = PDM_CLK_FD_RATIO_40;
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else if (clk_div <= 35)
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val = PDM_CLK_FD_RATIO_35;
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else
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return -EINVAL;
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regmap_update_bits(pdm->regmap, PDM_CLK_CTRL,
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PDM_CLK_FD_RATIO_MSK,
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val);
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}
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val = get_pdm_ds_ratio(samplerate);
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regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, PDM_DS_RATIO_MSK, val);
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regmap_update_bits(pdm->regmap, PDM_HPF_CTRL,
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PDM_HPF_CF_MSK, PDM_HPF_60HZ);
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regmap_update_bits(pdm->regmap, PDM_HPF_CTRL,
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PDM_HPF_LE | PDM_HPF_RE, PDM_HPF_LE | PDM_HPF_RE);
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regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, PDM_CLK_EN, PDM_CLK_EN);
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if (pdm->version != RK_PDM_RK3229)
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regmap_update_bits(pdm->regmap, PDM_CTRL0,
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PDM_MODE_MSK, PDM_MODE_LJ);
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val = 0;
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S8:
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val |= PDM_VDW(8);
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break;
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case SNDRV_PCM_FORMAT_S16_LE:
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val |= PDM_VDW(16);
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break;
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case SNDRV_PCM_FORMAT_S20_3LE:
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val |= PDM_VDW(20);
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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val |= PDM_VDW(24);
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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val |= PDM_VDW(32);
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break;
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default:
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return -EINVAL;
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}
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switch (params_channels(params)) {
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case 8:
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val |= PDM_PATH3_EN;
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fallthrough;
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case 6:
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val |= PDM_PATH2_EN;
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fallthrough;
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case 4:
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val |= PDM_PATH1_EN;
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fallthrough;
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case 2:
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val |= PDM_PATH0_EN;
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break;
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default:
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dev_err(pdm->dev, "invalid channel: %d\n",
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params_channels(params));
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return -EINVAL;
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}
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regmap_update_bits(pdm->regmap, PDM_CTRL0,
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PDM_PATH_MSK | PDM_VDW_MSK,
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val);
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/* all channels share the single FIFO */
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regmap_update_bits(pdm->regmap, PDM_DMA_CTRL, PDM_DMA_RDL_MSK,
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PDM_DMA_RDL(8 * params_channels(params)));
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return 0;
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}
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static int rockchip_pdm_set_fmt(struct snd_soc_dai *cpu_dai,
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unsigned int fmt)
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{
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struct rk_pdm_dev *pdm = to_info(cpu_dai);
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unsigned int mask = 0, val = 0;
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mask = PDM_CKP_MSK;
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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val = PDM_CKP_NORMAL;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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val = PDM_CKP_INVERTED;
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break;
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default:
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return -EINVAL;
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}
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pm_runtime_get_sync(cpu_dai->dev);
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regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, mask, val);
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pm_runtime_put(cpu_dai->dev);
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return 0;
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}
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static int rockchip_pdm_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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struct rk_pdm_dev *pdm = to_info(dai);
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int ret = 0;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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rockchip_pdm_rxctrl(pdm, 1);
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break;
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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rockchip_pdm_rxctrl(pdm, 0);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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static int rockchip_pdm_dai_probe(struct snd_soc_dai *dai)
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{
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struct rk_pdm_dev *pdm = to_info(dai);
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dai->capture_dma_data = &pdm->capture_dma_data;
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return 0;
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}
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static const struct snd_soc_dai_ops rockchip_pdm_dai_ops = {
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.set_fmt = rockchip_pdm_set_fmt,
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.trigger = rockchip_pdm_trigger,
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.hw_params = rockchip_pdm_hw_params,
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};
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#define ROCKCHIP_PDM_RATES SNDRV_PCM_RATE_8000_192000
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#define ROCKCHIP_PDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S20_3LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE)
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static struct snd_soc_dai_driver rockchip_pdm_dai = {
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.probe = rockchip_pdm_dai_probe,
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.capture = {
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.stream_name = "Capture",
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.channels_min = 2,
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.channels_max = 8,
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.rates = ROCKCHIP_PDM_RATES,
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.formats = ROCKCHIP_PDM_FORMATS,
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},
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.ops = &rockchip_pdm_dai_ops,
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.symmetric_rate = 1,
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};
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static const struct snd_soc_component_driver rockchip_pdm_component = {
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.name = "rockchip-pdm",
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};
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static int rockchip_pdm_runtime_suspend(struct device *dev)
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{
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struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
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clk_disable_unprepare(pdm->clk);
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clk_disable_unprepare(pdm->hclk);
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return 0;
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}
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static int rockchip_pdm_runtime_resume(struct device *dev)
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{
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struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(pdm->clk);
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if (ret) {
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dev_err(pdm->dev, "clock enable failed %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(pdm->hclk);
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if (ret) {
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dev_err(pdm->dev, "hclock enable failed %d\n", ret);
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return ret;
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}
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return 0;
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}
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static bool rockchip_pdm_wr_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case PDM_SYSCONFIG:
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case PDM_CTRL0:
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case PDM_CTRL1:
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case PDM_CLK_CTRL:
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case PDM_HPF_CTRL:
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case PDM_FIFO_CTRL:
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case PDM_DMA_CTRL:
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case PDM_INT_EN:
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case PDM_INT_CLR:
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case PDM_DATA_VALID:
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return true;
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default:
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return false;
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}
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}
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static bool rockchip_pdm_rd_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case PDM_SYSCONFIG:
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case PDM_CTRL0:
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case PDM_CTRL1:
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case PDM_CLK_CTRL:
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case PDM_HPF_CTRL:
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case PDM_FIFO_CTRL:
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case PDM_DMA_CTRL:
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case PDM_INT_EN:
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case PDM_INT_CLR:
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case PDM_INT_ST:
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case PDM_DATA_VALID:
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case PDM_RXFIFO_DATA:
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case PDM_VERSION:
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return true;
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default:
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return false;
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}
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}
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static bool rockchip_pdm_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case PDM_SYSCONFIG:
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case PDM_FIFO_CTRL:
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case PDM_INT_CLR:
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case PDM_INT_ST:
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case PDM_RXFIFO_DATA:
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return true;
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default:
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return false;
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}
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}
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static bool rockchip_pdm_precious_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case PDM_RXFIFO_DATA:
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return true;
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default:
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return false;
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}
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}
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static const struct reg_default rockchip_pdm_reg_defaults[] = {
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{0x04, 0x78000017},
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{0x08, 0x0bb8ea60},
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{0x18, 0x0000001f},
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};
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static const struct regmap_config rockchip_pdm_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = PDM_VERSION,
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.reg_defaults = rockchip_pdm_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(rockchip_pdm_reg_defaults),
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.writeable_reg = rockchip_pdm_wr_reg,
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.readable_reg = rockchip_pdm_rd_reg,
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.volatile_reg = rockchip_pdm_volatile_reg,
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.precious_reg = rockchip_pdm_precious_reg,
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.cache_type = REGCACHE_FLAT,
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};
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static const struct of_device_id rockchip_pdm_match[] __maybe_unused = {
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{ .compatible = "rockchip,pdm",
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.data = (void *)RK_PDM_RK3229 },
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{ .compatible = "rockchip,px30-pdm",
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.data = (void *)RK_PDM_RK3308 },
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{ .compatible = "rockchip,rk1808-pdm",
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.data = (void *)RK_PDM_RK3308 },
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{ .compatible = "rockchip,rk3308-pdm",
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.data = (void *)RK_PDM_RK3308 },
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{},
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};
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MODULE_DEVICE_TABLE(of, rockchip_pdm_match);
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static int rockchip_pdm_probe(struct platform_device *pdev)
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{
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const struct of_device_id *match;
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struct rk_pdm_dev *pdm;
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struct resource *res;
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void __iomem *regs;
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int ret;
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pdm = devm_kzalloc(&pdev->dev, sizeof(*pdm), GFP_KERNEL);
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if (!pdm)
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return -ENOMEM;
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match = of_match_device(rockchip_pdm_match, &pdev->dev);
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if (match)
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pdm->version = (enum rk_pdm_version)match->data;
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if (pdm->version == RK_PDM_RK3308) {
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pdm->reset = devm_reset_control_get(&pdev->dev, "pdm-m");
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if (IS_ERR(pdm->reset))
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return PTR_ERR(pdm->reset);
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(regs))
|
|
return PTR_ERR(regs);
|
|
|
|
pdm->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
|
|
&rockchip_pdm_regmap_config);
|
|
if (IS_ERR(pdm->regmap))
|
|
return PTR_ERR(pdm->regmap);
|
|
|
|
pdm->capture_dma_data.addr = res->start + PDM_RXFIFO_DATA;
|
|
pdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
|
|
pdm->capture_dma_data.maxburst = PDM_DMA_BURST_SIZE;
|
|
|
|
pdm->dev = &pdev->dev;
|
|
dev_set_drvdata(&pdev->dev, pdm);
|
|
|
|
pdm->clk = devm_clk_get(&pdev->dev, "pdm_clk");
|
|
if (IS_ERR(pdm->clk))
|
|
return PTR_ERR(pdm->clk);
|
|
|
|
pdm->hclk = devm_clk_get(&pdev->dev, "pdm_hclk");
|
|
if (IS_ERR(pdm->hclk))
|
|
return PTR_ERR(pdm->hclk);
|
|
|
|
ret = clk_prepare_enable(pdm->hclk);
|
|
if (ret)
|
|
return ret;
|
|
|
|
pm_runtime_enable(&pdev->dev);
|
|
if (!pm_runtime_enabled(&pdev->dev)) {
|
|
ret = rockchip_pdm_runtime_resume(&pdev->dev);
|
|
if (ret)
|
|
goto err_pm_disable;
|
|
}
|
|
|
|
ret = devm_snd_soc_register_component(&pdev->dev,
|
|
&rockchip_pdm_component,
|
|
&rockchip_pdm_dai, 1);
|
|
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "could not register dai: %d\n", ret);
|
|
goto err_suspend;
|
|
}
|
|
|
|
rockchip_pdm_rxctrl(pdm, 0);
|
|
ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "could not register pcm: %d\n", ret);
|
|
goto err_suspend;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_suspend:
|
|
if (!pm_runtime_status_suspended(&pdev->dev))
|
|
rockchip_pdm_runtime_suspend(&pdev->dev);
|
|
err_pm_disable:
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
clk_disable_unprepare(pdm->hclk);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int rockchip_pdm_remove(struct platform_device *pdev)
|
|
{
|
|
struct rk_pdm_dev *pdm = dev_get_drvdata(&pdev->dev);
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
if (!pm_runtime_status_suspended(&pdev->dev))
|
|
rockchip_pdm_runtime_suspend(&pdev->dev);
|
|
|
|
clk_disable_unprepare(pdm->clk);
|
|
clk_disable_unprepare(pdm->hclk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int rockchip_pdm_suspend(struct device *dev)
|
|
{
|
|
struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
|
|
|
|
regcache_mark_dirty(pdm->regmap);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rockchip_pdm_resume(struct device *dev)
|
|
{
|
|
struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
|
|
int ret;
|
|
|
|
ret = pm_runtime_get_sync(dev);
|
|
if (ret < 0) {
|
|
pm_runtime_put(dev);
|
|
return ret;
|
|
}
|
|
|
|
ret = regcache_sync(pdm->regmap);
|
|
|
|
pm_runtime_put(dev);
|
|
|
|
return ret;
|
|
}
|
|
#endif
|
|
|
|
static const struct dev_pm_ops rockchip_pdm_pm_ops = {
|
|
SET_RUNTIME_PM_OPS(rockchip_pdm_runtime_suspend,
|
|
rockchip_pdm_runtime_resume, NULL)
|
|
SET_SYSTEM_SLEEP_PM_OPS(rockchip_pdm_suspend, rockchip_pdm_resume)
|
|
};
|
|
|
|
static struct platform_driver rockchip_pdm_driver = {
|
|
.probe = rockchip_pdm_probe,
|
|
.remove = rockchip_pdm_remove,
|
|
.driver = {
|
|
.name = "rockchip-pdm",
|
|
.of_match_table = of_match_ptr(rockchip_pdm_match),
|
|
.pm = &rockchip_pdm_pm_ops,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(rockchip_pdm_driver);
|
|
|
|
MODULE_AUTHOR("Sugar <sugar.zhang@rock-chips.com>");
|
|
MODULE_DESCRIPTION("Rockchip PDM Controller Driver");
|
|
MODULE_LICENSE("GPL v2");
|