linux/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
Linus Walleij 1ec033f00c Qualcomm pinctrl Devicetree bindings changes for v6.3, part two
Several minor cleanups and fixes on Qualcomm pin controller Devicetree
 bindings - add missing input-disable, correct GPIO pin name patterns in
 bindings, correct number of GPIOs in gpio-ranges property.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmPiiaoQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1+75EACXetz0bN1O8oUhwUv2mbcWoWYvy2QnfJZi
 NbqnAdFjfk66p1uNBPvVV2DxRuSiGaXsH5KJRP6WY805QGF4lfVZVsaaQkl4Dug8
 yjolquoV8kOuxfY2G/TI8VuTp5OK9yHnti21KGB7l0kdYc5OwbjgKkB+DBo8QZ3K
 6kW5EmRjqbGZ8ED0/Ymj6K55YPARCx/IoCA1vedl770IqTEIZsag49n9r+c4IqVg
 Sx7pgAhZm01XyHpQdLAc5pfmvZffGYLRr3cFhBVlA8hwVGgjdDza+AMJMoJ2rJxT
 bL2/2io3FRWr0Fi3iFJObDz2rapNqbnypr4lBeKZXMGl81yQi0hwraaVJWc0+n+x
 3JGD/CHWFWD4XFVO7ZO9KwZzexmuIkupMmr4FV0fgr+M6HsNyaGjpc+BNoFk1NNK
 jM0l0+Lazgao3WbpKLaPyvXnoBVF2/HrG1l++wRp2+LpytHStxFmFtmUGsYP0w25
 YAUmeJF2RkTQ6uZebLpCf3q0kNgfeHqv2M6Qjz4Acb5FfQSjkuHwyeiPhGgS6TUf
 8ZTA26Mp8oPc6pntZUVvwHljZ8jXN5wzh+TheCAHCfAyPKOJoHdOr6+sQQEG0rc7
 5J2Hd1wm4FhK197PH8lmUUYC/hfcl8MyOn8iY/jq9grN0e7lkmLbxl2r86DUNcWu
 Cv1sFd7d1w==
 =VNb/
 -----END PGP SIGNATURE-----

Merge tag 'qcom-pinctrl-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into devel

Qualcomm pinctrl Devicetree bindings changes for v6.3, part two

Several minor cleanups and fixes on Qualcomm pin controller Devicetree
bindings - add missing input-disable, correct GPIO pin name patterns in
bindings, correct number of GPIOs in gpio-ranges property.
2023-02-08 16:07:59 +01:00

165 lines
4.3 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SM8450 SoC LPASS LPI TLMM
maintainers:
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
description:
Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
(LPASS) Low Power Island (LPI) of Qualcomm SM8450 SoC.
properties:
compatible:
const: qcom,sm8450-lpass-lpi-pinctrl
reg:
items:
- description: LPASS LPI TLMM Control and Status registers
- description: LPASS LPI pins SLEW registers
clocks:
items:
- description: LPASS Core voting clock
- description: LPASS Audio voting clock
clock-names:
items:
- const: core
- const: audio
gpio-controller: true
"#gpio-cells":
description: Specifying the pin number and flags, as defined in
include/dt-bindings/gpio/gpio.h
const: 2
gpio-ranges:
maxItems: 1
patternProperties:
"-state$":
oneOf:
- $ref: "#/$defs/qcom-sm8450-lpass-state"
- patternProperties:
"-pins$":
$ref: "#/$defs/qcom-sm8450-lpass-state"
additionalProperties: false
$defs:
qcom-sm8450-lpass-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: /schemas/pinctrl/pincfg-node.yaml
properties:
pins:
description:
List of gpio pins affected by the properties specified in this
subnode.
items:
pattern: "^gpio([0-9]|1[0-9]|2[0-2])$"
function:
enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data,
dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic4_clk,
dmic4_data, i2s2_clk, i2s2_ws, dmic3_clk, dmic3_data,
qua_mi2s_sclk, qua_mi2s_ws, qua_mi2s_data, i2s1_clk, i2s1_ws,
i2s1_data, wsa_swr_clk, wsa_swr_data, wsa2_swr_clk,
wsa2_swr_data, i2s2_data, i2s4_ws, i2s4_clk, i2s4_data,
slimbus_clk, i2s3_clk, i2s3_ws, i2s3_data, slimbus_data,
ext_mclk1_c, ext_mclk1_b, ext_mclk1_a, ext_mclk1_d,
ext_mclk1_e ]
description:
Specify the alternative function to be configured for the specified
pins.
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
default: 2
description:
Selects the drive strength for the specified pins, in mA.
slew-rate:
enum: [0, 1, 2, 3]
default: 0
description: |
0: No adjustments
1: Higher Slew rate (faster edges)
2: Lower Slew rate (slower edges)
3: Reserved (No adjustments)
bias-bus-hold: true
bias-pull-down: true
bias-pull-up: true
bias-disable: true
input-enable: true
output-high: true
output-low: true
required:
- pins
- function
additionalProperties: false
allOf:
- $ref: pinctrl.yaml#
required:
- compatible
- reg
- clocks
- clock-names
- gpio-controller
- "#gpio-cells"
- gpio-ranges
additionalProperties: false
examples:
- |
#include <dt-bindings/sound/qcom,q6afe.h>
pinctrl@3440000 {
compatible = "qcom,sm8450-lpass-lpi-pinctrl";
reg = <0x3440000 0x20000>,
<0x34d0000 0x10000>;
clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
clock-names = "core", "audio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpi_tlmm 0 0 23>;
wsa-swr-active-state {
clk-pins {
pins = "gpio10";
function = "wsa_swr_clk";
drive-strength = <2>;
slew-rate = <1>;
bias-disable;
};
data-pins {
pins = "gpio11";
function = "wsa_swr_data";
drive-strength = <2>;
slew-rate = <1>;
};
};
tx-swr-sleep-clk-state {
pins = "gpio0";
function = "swr_tx_clk";
drive-strength = <2>;
bias-pull-down;
};
};