391629bdfc
Page table entries are now in embedded in VM BO, so we do not need struct amdgpu_vm_pt. This patch replaces struct amdgpu_vm_pt with struct amdgpu_vm_bo_base. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
105 lines
3.3 KiB
C
105 lines
3.3 KiB
C
// SPDX-License-Identifier: MIT
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/* Copyright 2021 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: David Nieto
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* Roy Sun
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*/
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#include <linux/debugfs.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/uaccess.h>
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#include <linux/reboot.h>
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#include <linux/syscalls.h>
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#include <drm/amdgpu_drm.h>
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#include <drm/drm_debugfs.h>
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#include "amdgpu.h"
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#include "amdgpu_vm.h"
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#include "amdgpu_gem.h"
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#include "amdgpu_ctx.h"
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#include "amdgpu_fdinfo.h"
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static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = {
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[AMDGPU_HW_IP_GFX] = "gfx",
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[AMDGPU_HW_IP_COMPUTE] = "compute",
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[AMDGPU_HW_IP_DMA] = "dma",
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[AMDGPU_HW_IP_UVD] = "dec",
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[AMDGPU_HW_IP_VCE] = "enc",
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[AMDGPU_HW_IP_UVD_ENC] = "enc_1",
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[AMDGPU_HW_IP_VCN_DEC] = "dec",
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[AMDGPU_HW_IP_VCN_ENC] = "enc",
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[AMDGPU_HW_IP_VCN_JPEG] = "jpeg",
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};
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void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
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{
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struct amdgpu_fpriv *fpriv;
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uint32_t bus, dev, fn, i, domain;
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uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0;
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struct drm_file *file = f->private_data;
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struct amdgpu_device *adev = drm_to_adev(file->minor->dev);
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int ret;
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ret = amdgpu_file_to_fpriv(f, &fpriv);
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if (ret)
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return;
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bus = adev->pdev->bus->number;
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domain = pci_domain_nr(adev->pdev->bus);
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dev = PCI_SLOT(adev->pdev->devfn);
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fn = PCI_FUNC(adev->pdev->devfn);
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ret = amdgpu_bo_reserve(fpriv->vm.root.bo, false);
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if (ret) {
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DRM_ERROR("Fail to reserve bo\n");
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return;
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}
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amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, >t_mem, &cpu_mem);
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amdgpu_bo_unreserve(fpriv->vm.root.bo);
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seq_printf(m, "pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus,
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dev, fn, fpriv->vm.pasid);
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seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL);
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seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL);
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seq_printf(m, "cpu mem:\t%llu kB\n", cpu_mem/1024UL);
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for (i = 0; i < AMDGPU_HW_IP_NUM; i++) {
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uint32_t count = amdgpu_ctx_num_entities[i];
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int idx = 0;
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uint64_t total = 0, min = 0;
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uint32_t perc, frac;
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for (idx = 0; idx < count; idx++) {
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total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr,
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i, idx, &min);
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if ((total == 0) || (min == 0))
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continue;
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perc = div64_u64(10000 * total, min);
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frac = perc % 100;
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seq_printf(m, "%s%d:\t%d.%d%%\n",
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amdgpu_ip_name[i],
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idx, perc/100, frac);
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}
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}
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}
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