6d75c6f40a
* Reorganise the arm64 kernel VA space and add support for LPA2 (at stage 1, KVM stage 2 was merged earlier) - 52-bit VA/PA address range with 4KB and 16KB pages * Enable Rust on arm64 * Support for the 2023 dpISA extensions (data processing ISA), host only * arm64 perf updates: - StarFive's StarLink (integrates one or more CPU cores with a shared L3 memory system) PMU support - Enable HiSilicon Erratum 162700402 quirk for HIP09 - Several updates for the HiSilicon PCIe PMU driver - Arm CoreSight PMU support - Convert all drivers under drivers/perf/ to use .remove_new() * Miscellaneous: - Don't enable workarounds for "rare" errata by default - Clean up the DAIF flags handling for EL0 returns (in preparation for NMI support) - Kselftest update for ptrace() - Update some of the sysreg field definitions - Slight improvement in the code generation for inline asm I/O accessors to permit offset addressing - kretprobes: acquire regs via a BRK exception (previously done via a trampoline handler) - SVE/SME cleanups, comment updates - Allow CALL_OPS+CC_OPTIMIZE_FOR_SIZE with clang (previously disabled due to gcc silently ignoring -falign-functions=N) -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmXxiSgACgkQa9axLQDI XvHd7hAAjQrQqxJogPT2ahM5/gxct8qTrXpIgX0B1Y7bb5R8ztvOUN9MJNuDyRsj 0s28SSZw387LReM5OUu+U6G/iahcuNAyP/8d9qeac32Tidd255fV3KPEh4C4eC+u 0HeOqLBZ+stmNoa71tBC2K6SmchizhYyYduvRnri8km8K4OMDawHWqWRTXl0PNRT RMVJvZTDJMPfMBFeD4+B7EnSFOoP14tKCw9MZvlbpT2PEV0kINjhCQiojW2jJgqv w36vm/dhwsg1avSzT1xhy3KE+m+7n28+IC/wr1HB7c1WumvYKv7Z84ieCp3PlO3Z owvVO7dKJC6X3RkoY6Kge5p2RHU6poDerDVHYiAvG+Zi57nrDmHyAubskThsGTGR AibSEeJ5nQ0yM6hx7zAIQa5XEo4l0svD1ZM7NynY+5JR44W9cdAH3SnEsvIBMGIf /ja+iZ1W4ZQnIESQXD5uDPSxILfqQ8Ebhdorpw+Qg3rB7OhdTdGSSGQCi6V2PcJH d/ErFO+i0lFRBPJtBbUAN4EEu3HJcVYEoEnVJYQahC+6KyNGLxO+7L6sH0YO7Pag P1LRa6h8ktuBMrbCrOPWdmJYNDYCbb5rRtmcCwO0ItZ4g5tYWp9djFc8pyctCaNB MZxxRrUCNwXTOcFTDiYzyk+JCvpf3EvXfvj8AH+P8BMjFWgqHqw= =KTD/ -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: "The major features are support for LPA2 (52-bit VA/PA with 4K and 16K pages), the dpISA extension and Rust enabled on arm64. The changes are mostly contained within the usual arch/arm64/, drivers/perf, the arm64 Documentation and kselftests. The exception is the Rust support which touches some generic build files. Summary: - Reorganise the arm64 kernel VA space and add support for LPA2 (at stage 1, KVM stage 2 was merged earlier) - 52-bit VA/PA address range with 4KB and 16KB pages - Enable Rust on arm64 - Support for the 2023 dpISA extensions (data processing ISA), host only - arm64 perf updates: - StarFive's StarLink (integrates one or more CPU cores with a shared L3 memory system) PMU support - Enable HiSilicon Erratum 162700402 quirk for HIP09 - Several updates for the HiSilicon PCIe PMU driver - Arm CoreSight PMU support - Convert all drivers under drivers/perf/ to use .remove_new() - Miscellaneous: - Don't enable workarounds for "rare" errata by default - Clean up the DAIF flags handling for EL0 returns (in preparation for NMI support) - Kselftest update for ptrace() - Update some of the sysreg field definitions - Slight improvement in the code generation for inline asm I/O accessors to permit offset addressing - kretprobes: acquire regs via a BRK exception (previously done via a trampoline handler) - SVE/SME cleanups, comment updates - Allow CALL_OPS+CC_OPTIMIZE_FOR_SIZE with clang (previously disabled due to gcc silently ignoring -falign-functions=N)" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (134 commits) Revert "mm: add arch hook to validate mmap() prot flags" Revert "arm64: mm: add support for WXN memory translation attribute" Revert "ARM64: Dynamically allocate cpumasks and increase supported CPUs to 512" ARM64: Dynamically allocate cpumasks and increase supported CPUs to 512 kselftest/arm64: Add 2023 DPISA hwcap test coverage kselftest/arm64: Add basic FPMR test kselftest/arm64: Handle FPMR context in generic signal frame parser arm64/hwcap: Define hwcaps for 2023 DPISA features arm64/ptrace: Expose FPMR via ptrace arm64/signal: Add FPMR signal handling arm64/fpsimd: Support FEAT_FPMR arm64/fpsimd: Enable host kernel access to FPMR arm64/cpufeature: Hook new identification registers up to cpufeature docs: perf: Fix build warning of hisi-pcie-pmu.rst perf: starfive: Only allow COMPILE_TEST for 64-bit architectures MAINTAINERS: Add entry for StarFive StarLink PMU docs: perf: Add description for StarFive's StarLink PMU dt-bindings: perf: starfive: Add JH8100 StarLink PMU perf: starfive: Add StarLink PMU support docs: perf: Update usage for target filter of hisi-pcie-pmu ...
192 lines
5.7 KiB
Rust
192 lines
5.7 KiB
Rust
// SPDX-License-Identifier: GPL-2.0
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//! The custom target specification file generator for `rustc`.
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//!
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//! To configure a target from scratch, a JSON-encoded file has to be passed
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//! to `rustc` (introduced in [RFC 131]). These options and the file itself are
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//! unstable. Eventually, `rustc` should provide a way to do this in a stable
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//! manner. For instance, via command-line arguments. Therefore, this file
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//! should avoid using keys which can be set via `-C` or `-Z` options.
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//!
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//! [RFC 131]: https://rust-lang.github.io/rfcs/0131-target-specification.html
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use std::{
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collections::HashMap,
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fmt::{Display, Formatter, Result},
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io::BufRead,
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};
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enum Value {
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Boolean(bool),
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Number(i32),
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String(String),
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Object(Object),
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}
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type Object = Vec<(String, Value)>;
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/// Minimal "almost JSON" generator (e.g. no `null`s, no arrays, no escaping),
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/// enough for this purpose.
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impl Display for Value {
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fn fmt(&self, formatter: &mut Formatter<'_>) -> Result {
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match self {
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Value::Boolean(boolean) => write!(formatter, "{}", boolean),
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Value::Number(number) => write!(formatter, "{}", number),
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Value::String(string) => write!(formatter, "\"{}\"", string),
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Value::Object(object) => {
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formatter.write_str("{")?;
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if let [ref rest @ .., ref last] = object[..] {
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for (key, value) in rest {
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write!(formatter, "\"{}\": {},", key, value)?;
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}
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write!(formatter, "\"{}\": {}", last.0, last.1)?;
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}
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formatter.write_str("}")
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}
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}
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}
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}
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struct TargetSpec(Object);
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impl TargetSpec {
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fn new() -> TargetSpec {
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TargetSpec(Vec::new())
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}
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}
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trait Push<T> {
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fn push(&mut self, key: &str, value: T);
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}
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impl Push<bool> for TargetSpec {
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fn push(&mut self, key: &str, value: bool) {
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self.0.push((key.to_string(), Value::Boolean(value)));
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}
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}
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impl Push<i32> for TargetSpec {
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fn push(&mut self, key: &str, value: i32) {
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self.0.push((key.to_string(), Value::Number(value)));
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}
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}
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impl Push<String> for TargetSpec {
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fn push(&mut self, key: &str, value: String) {
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self.0.push((key.to_string(), Value::String(value)));
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}
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}
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impl Push<&str> for TargetSpec {
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fn push(&mut self, key: &str, value: &str) {
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self.push(key, value.to_string());
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}
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}
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impl Push<Object> for TargetSpec {
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fn push(&mut self, key: &str, value: Object) {
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self.0.push((key.to_string(), Value::Object(value)));
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}
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}
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impl Display for TargetSpec {
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fn fmt(&self, formatter: &mut Formatter<'_>) -> Result {
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// We add some newlines for clarity.
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formatter.write_str("{\n")?;
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if let [ref rest @ .., ref last] = self.0[..] {
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for (key, value) in rest {
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write!(formatter, " \"{}\": {},\n", key, value)?;
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}
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write!(formatter, " \"{}\": {}\n", last.0, last.1)?;
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}
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formatter.write_str("}")
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}
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}
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struct KernelConfig(HashMap<String, String>);
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impl KernelConfig {
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/// Parses `include/config/auto.conf` from `stdin`.
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fn from_stdin() -> KernelConfig {
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let mut result = HashMap::new();
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let stdin = std::io::stdin();
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let mut handle = stdin.lock();
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let mut line = String::new();
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loop {
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line.clear();
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if handle.read_line(&mut line).unwrap() == 0 {
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break;
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}
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if line.starts_with('#') {
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continue;
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}
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let (key, value) = line.split_once('=').expect("Missing `=` in line.");
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result.insert(key.to_string(), value.trim_end_matches('\n').to_string());
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}
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KernelConfig(result)
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}
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/// Does the option exist in the configuration (any value)?
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///
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/// The argument must be passed without the `CONFIG_` prefix.
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/// This avoids repetition and it also avoids `fixdep` making us
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/// depend on it.
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fn has(&self, option: &str) -> bool {
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let option = "CONFIG_".to_owned() + option;
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self.0.contains_key(&option)
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}
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}
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fn main() {
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let cfg = KernelConfig::from_stdin();
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let mut ts = TargetSpec::new();
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// `llvm-target`s are taken from `scripts/Makefile.clang`.
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if cfg.has("ARM64") {
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panic!("arm64 uses the builtin rustc aarch64-unknown-none target");
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} else if cfg.has("X86_64") {
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ts.push("arch", "x86_64");
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ts.push(
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"data-layout",
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"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128",
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);
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let mut features = "-3dnow,-3dnowa,-mmx,+soft-float".to_string();
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if cfg.has("MITIGATION_RETPOLINE") {
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features += ",+retpoline-external-thunk";
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}
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ts.push("features", features);
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ts.push("llvm-target", "x86_64-linux-gnu");
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ts.push("target-pointer-width", "64");
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} else if cfg.has("LOONGARCH") {
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ts.push("arch", "loongarch64");
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ts.push("data-layout", "e-m:e-p:64:64-i64:64-i128:128-n64-S128");
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ts.push("features", "-f,-d");
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ts.push("llvm-target", "loongarch64-linux-gnusf");
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ts.push("llvm-abiname", "lp64s");
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ts.push("target-pointer-width", "64");
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} else {
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panic!("Unsupported architecture");
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}
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ts.push("emit-debug-gdb-scripts", false);
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ts.push("frame-pointer", "may-omit");
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ts.push(
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"stack-probes",
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vec![("kind".to_string(), Value::String("none".to_string()))],
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);
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// Everything else is LE, whether `CPU_LITTLE_ENDIAN` is declared or not
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// (e.g. x86). It is also `rustc`'s default.
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if cfg.has("CPU_BIG_ENDIAN") {
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ts.push("target-endian", "big");
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}
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println!("{}", ts);
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}
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