d8ed75d593
To enable PCI legacy IRQs on platforms booting with ACPI, arch code should include ACPI-specific callbacks that parse and set-up the device IRQ number, equivalent to the DT boot path. Owing to the current ACPI core scan handlers implementation, ACPI PCI legacy IRQs bindings cannot be parsed at device add time, since that would trigger ACPI scan handlers ordering issues depending on how the ACPI tables are defined. To solve this problem and consolidate FW PCI legacy IRQs parsing in one single pcibios callback (pending final removal), this patch moves DT PCI IRQ parsing to the pcibios_alloc_irq() callback (called by PCI core code at driver probe time) and adds ACPI PCI legacy IRQs parsing to the same callback too, so that FW PCI legacy IRQs parsing is confined in one single arch callback that can be easily removed when code parsing PCI legacy IRQs is consolidated and moved to core PCI code. Suggested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Tomasz Nowicki <tn@semihalf.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
107 lines
2.2 KiB
C
107 lines
2.2 KiB
C
/*
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* Code borrowed from powerpc/kernel/pci-common.c
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*
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* Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
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* Copyright (C) 2014 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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*/
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#include <linux/acpi.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/of_pci.h>
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#include <linux/of_platform.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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/*
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* Called after each bus is probed, but before its children are examined
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*/
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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/* nothing to do, expected to be removed in the future */
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}
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/*
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* We don't have to worry about legacy ISA devices, so nothing to do here
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*/
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resource_size_t pcibios_align_resource(void *data, const struct resource *res,
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resource_size_t size, resource_size_t align)
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{
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return res->start;
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}
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/**
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* pcibios_enable_device - Enable I/O and memory.
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* @dev: PCI device to be enabled
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* @mask: bitmask of BARs to enable
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*/
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int pcibios_enable_device(struct pci_dev *dev, int mask)
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{
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if (pci_has_flag(PCI_PROBE_ONLY))
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return 0;
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return pci_enable_resources(dev, mask);
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}
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/*
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* Try to assign the IRQ number when probing a new device
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*/
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int pcibios_alloc_irq(struct pci_dev *dev)
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{
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if (acpi_disabled)
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dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
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#ifdef CONFIG_ACPI
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else
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return acpi_pci_irq_enable(dev);
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#endif
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return 0;
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}
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/*
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* raw_pci_read/write - Platform-specific PCI config space access.
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*/
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int raw_pci_read(unsigned int domain, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 *val)
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{
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return -ENXIO;
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}
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int raw_pci_write(unsigned int domain, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 val)
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{
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return -ENXIO;
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}
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#ifdef CONFIG_NUMA
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int pcibus_to_node(struct pci_bus *bus)
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{
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return dev_to_node(&bus->dev);
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}
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EXPORT_SYMBOL(pcibus_to_node);
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#endif
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#ifdef CONFIG_ACPI
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int acpi_pci_bus_find_domain_nr(struct pci_bus *bus)
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{
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return 0;
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}
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/* Root bridge scanning */
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struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
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{
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/* TODO: Should be revisited when implementing PCI on ACPI */
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return NULL;
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}
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#endif
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