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With recent enough motherboard firmware, core tile can be fitted
in either of the two daughterboard sites. The non-DT tile code for
V2P-CA9 did not check that when configuring DVI output nor setting
CLCD pixel clock.
Fixed now, providing "get master site" API in motherboard's code.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
d927daf5c8