570e471ce0
Add the smpctrl registers to the infinity2m dtsi so that the second CPU can be enabled on chips in this family. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20201201134330.3037007-9-daniel@0x0f.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
23 lines
353 B
Plaintext
23 lines
353 B
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (c) 2020 thingy.jp.
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* Author: Daniel Palmer <daniel@thingy.jp>
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*/
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#include "mstar-infinity.dtsi"
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&cpus {
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x1>;
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};
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};
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&riu {
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smpctrl: smpctrl@204000 {
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reg = <0x204000 0x200>;
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status = "disabled";
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};
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};
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