After the last release contained a surprising amount of new 32-bit machines, this time two thirds of the code changes are for 64-bit. The usual updates to existing files include: - Device tree compiler warning fixes for Berlin, Renesas, SoCFPGA, nomadik, stm32, Allwinner, TI Keystone - Support for additional devices on existing machines on Renesas, SoCFPGA, at91, hisilicon, OMAP, Tegra, TI K3, Allwinner, Broadcom, ux500, Mediatek, Marvell Armada, Marvell MMP, ZynqMP, AMLogic, Qualcomm, i.MX, Layerscape, Actions, ASpeed, Toshiba - Cleanups and minor fixes for Renesas, at91, mstar, ux500, Samsung, stm32, Tegra, Broadcom, Mediatek, Marvell MMP, AMLogic, Qualcomm, i.MX, Rockchip, ASpeed, Zynq Only three new SoCs this time, but a number of boards across: Renesas: - Two Beacon EmbeddedWorks boards (RZ/G2H and RZ/G2N based) Intel SoCFPGA: - eASIC N5X board (N5X) ST-Ericsson Ux500: - Samsung GT-I9070 (Janice) phone (u8500) TI OMAP: - MYIR Tech Limited development board (AM335X) Allwinner/sunxi: - SL631 Action Camera (V3) - PineTab Early Adopter tablet (A64) Broadcom: - BCM4906/BCM4908 networking chip - Netgear R8000P router (BCM5906) AMLogic: - Hardkernel ODROID-HC4 development board (SM1) - Beelink GS-King-X TV Box (S922X) Qualcomm: - Snapdragon 888 / SM8350 high-end phone SoC - Qualcomm SDX55 5G modem as standalone SoC - Snapdragon MTP reference board (SM8350) - Snapdragon MTP reference board (SDX55) - Sony Kitakami phones: Xperia Z3+/Z4/Z5 (APQ8094) - Alcatel Idol 3 phone (MSM8916) - ASUS Zenfone 2 Laser phone (MSM8916) - BQ Aquaris X5 aka Longcheer L8910 phone (MSM8916) - OnePlus6 phone (SDM845) - OnePlus6T phone (SDM845) - Alfa Network AP120C-AC access point (IPQ4018) NXP i.MX6 (32-bit): - Plymovent BAS base system controller for filter systems (imx6dl) - Protonic MVT industrial touchscreen terminals (imx6dl) - Protonic PRTI6G reference board (imx6ul) - Kverneland UT1, UT1Q, UT1P, TGO agricultural terminals (imx6q/dl/qp) NXP i.MX8 (64-bit) - Beacon i.MX8M Nano development kit (imx8mn) - Boundary Devices i.MX8MM Nitrogen SBC (imx8mm) - Gateworks Venice i.MX 8M Mini Development Kits (imx8mm) - phyBOARD-Pollux-i.MX8MP (imx8mp) - Purism Librem5 Evergreen phone (imx8mp) - Kontron SMARC-sAL28 system-on-module(imx8mp) Rockchip: - NanoPi M4B Single-board computer (RK3399) - Radxa Rock Pi E router SBC (RK3328) ASpeed: - Ampere Mt. Jade, a BMC for an x86 server (AST2500) - IBM Everest, a BMC for a Power10 server (AST2600) - Supermicro x11spi, a BMC for an ARM server (AST2500) Zynq: - Ebang EBAZ4205, FPGA board (Zynq-7000) - ZynqMP zcu104 revC reference platform (ZynqMP) Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmAppIsACgkQYKtH/8kJ Uif/aBAA0lMYr+WRF9STUC/4u57e+QO7m53bahyO8mniX9raORRy4NxFwpDECXgP s9D/z7aBEojhK5vucsT6Ne5k13udRoI+hH/67t6NHxDod74pHcGJPVWuqXQRuoR+ 9qtm+UUJb+BMZpb2oFSA1KIfnp8GoDKd1jEhCRu3DP1YMoOD/KgZGjbOcBOkqelo EoFHyFhu0qzuDTOO2LgjoW0IYvY48+nzLEPhkBlGPMI7ZMnVPBC4vemowq4prFM/ VknK+AgX8gR2dv8izygQxSVorhEbFrLqlbRCk1AvXDh2EmOGj+8LRVTyA9acZsHl nLqpgPuTc+V8NBPgiHP+DVxRI/DY5mqMMhMj8KIAY8fpH1fY+9CSxeGid8R7LMAQ rTplXr3AHRU4a3rvD5H9GF/WmHKUgcaEE5I9nABzGQW1nFxTPxAYi/YhzNL7y+GZ /em/G+K2zCLANjd4Ij8eyMu6dJv5NBsL5yWhBpkUg/+PLM+0DzYthD9dZ0u11fYf 9b3pW/cM7xw6DL1TRsdVGTE+Y8IsW00RYDKC/7nwKrrtHQ201tIevSYeWNKysMes 2lAuGnUIOquSd/OBjo9a1xGECqYLV95k7fk0juoSsOqzYVnDTt7wDx4W+MI9pwix wVrt0lkRnebgRToioeEPQG0WWitQ1ZkMOWZU4jYiZ2cIXyVEMJ8= =RIJK -----END PGP SIGNATURE----- Merge tag 'arm-dt-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC devicetree updates from Arnd Bergmann: "After the last release contained a surprising amount of new 32-bit machines, this time two thirds of the code changes are for 64-bit. The usual updates to existing files include: - Device tree compiler warning fixes for Berlin, Renesas, SoCFPGA, nomadik, stm32, Allwinner, TI Keystone - Support for additional devices on existing machines on Renesas, SoCFPGA, at91, hisilicon, OMAP, Tegra, TI K3, Allwinner, Broadcom, ux500, Mediatek, Marvell Armada, Marvell MMP, ZynqMP, AMLogic, Qualcomm, i.MX, Layerscape, Actions, ASpeed, Toshiba - Cleanups and minor fixes for Renesas, at91, mstar, ux500, Samsung, stm32, Tegra, Broadcom, Mediatek, Marvell MMP, AMLogic, Qualcomm, i.MX, Rockchip, ASpeed, Zynq Only three new SoCs this time, but a number of boards across: Renesas: - Two Beacon EmbeddedWorks boards (RZ/G2H and RZ/G2N based) Intel SoCFPGA: - eASIC N5X board (N5X) ST-Ericsson Ux500: - Samsung GT-I9070 (Janice) phone (u8500) TI OMAP: - MYIR Tech Limited development board (AM335X) Allwinner/sunxi: - SL631 Action Camera (V3) - PineTab Early Adopter tablet (A64) Broadcom: - BCM4906 networking chip - Netgear R8000P router (BCM4906) AMLogic: - Hardkernel ODROID-HC4 development board (SM1) - Beelink GS-King-X TV Box (S922X) Qualcomm: - Snapdragon 888 / SM8350 high-end phone SoC - Qualcomm SDX55 5G modem as standalone SoC - Snapdragon MTP reference board (SM8350) - Snapdragon MTP reference board (SDX55) - Sony Kitakami phones: Xperia Z3+/Z4/Z5 (APQ8094) - Alcatel Idol 3 phone (MSM8916) - ASUS Zenfone 2 Laser phone (MSM8916) - BQ Aquaris X5 aka Longcheer L8910 phone (MSM8916) - OnePlus6 phone (SDM845) - OnePlus6T phone (SDM845) - Alfa Network AP120C-AC access point (IPQ4018) NXP i.MX6 (32-bit): - Plymovent BAS base system controller for filter systems (imx6dl) - Protonic MVT industrial touchscreen terminals (imx6dl) - Protonic PRTI6G reference board (imx6ul) - Kverneland UT1, UT1Q, UT1P, TGO agricultural terminals (imx6q/dl/qp) NXP i.MX8 (64-bit) - Beacon i.MX8M Nano development kit (imx8mn) - Boundary Devices i.MX8MM Nitrogen SBC (imx8mm) - Gateworks Venice i.MX 8M Mini Development Kits (imx8mm) - phyBOARD-Pollux-i.MX8MP (imx8mp) - Purism Librem5 Evergreen phone (imx8mp) - Kontron SMARC-sAL28 system-on-module(imx8mp) Rockchip: - NanoPi M4B Single-board computer (RK3399) - Radxa Rock Pi E router SBC (RK3328) ASpeed: - Ampere Mt. Jade, a BMC for an x86 server (AST2500) - IBM Everest, a BMC for a Power10 server (AST2600) - Supermicro x11spi, a BMC for an ARM server (AST2500) Zynq: - Ebang EBAZ4205, FPGA board (Zynq-7000) - ZynqMP zcu104 revC reference platform (ZynqMP)" * tag 'arm-dt-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (584 commits) ARM: dts: aspeed: align GPIO hog names with dtschema ARM: dts: aspeed: fix PCA95xx GPIO expander properties on Portwell dt-bindings: spi: zynq: Convert Zynq QSPI binding to yaml arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver ARM: dts: aspeed: ast2600evb: Add enable ehci and uhci ARM: dts: aspeed: mowgli: Add i2c rtc device ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address dt-bindings: arm: xilinx: Add missing Zturn boards ARM: dts: ebaz4205: add pinctrl entries for switches ARM: dts: add Ebang EBAZ4205 device tree dt-bindings: arm: add Ebang EBAZ4205 board dt-bindings: add ebang vendor prefix ARM: dts: aspeed: Add Everest BMC machine ARM: dts: aspeed: inspur-fp5280g2: Add ipsps1 driver ARM: dts: aspeed: inspur-fp5280g2: Add GPIO line names ARM: dts: aspeed: Add Supermicro x11spi BMC machine ARM: dts: aspeed: g220a: Fix some gpio ARM: dts: aspeed: g220a: Enable ipmb ARM: dts: aspeed: rainier: Add eMMC clock phase compensation ARM: dts: aspeed: Add LCLK to lpc-snoop ...
625 lines
15 KiB
Plaintext
625 lines
15 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2011 ST-Ericsson AB
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*/
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/dts-v1/;
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#include "ste-db9500.dtsi"
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#include "ste-href-ab8500.dtsi"
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#include "ste-href-family-pinctrl.dtsi"
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/ {
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model = "Calao Systems Snowball platform with device tree";
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compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>;
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};
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en_3v3_reg: en_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "en-3v3-fixed-supply";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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/* AB8500 GPIOs start from 1 - offset 25 is GPIO26. */
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gpio = <&ab8500_gpio 25 0x4>;
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startup-delay-us = <5000>;
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enable-active-high;
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};
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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button@1 {
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debounce-interval = <50>;
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wakeup-source;
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linux,code = <2>;
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label = "userpb";
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gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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};
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button@2 {
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debounce-interval = <50>;
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wakeup-source;
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linux,code = <3>;
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label = "extkb1";
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gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
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};
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button@3 {
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debounce-interval = <50>;
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wakeup-source;
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linux,code = <4>;
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label = "extkb2";
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gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
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};
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button@4 {
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debounce-interval = <50>;
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wakeup-source;
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linux,code = <5>;
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label = "extkb3";
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gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
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};
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button@5 {
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debounce-interval = <50>;
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wakeup-source;
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linux,code = <6>;
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label = "extkb4";
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gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&gpioled_snowball_mode>;
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used-led {
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label = "user_led";
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gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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};
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soc {
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/* Name the GPIO muxed rails on the Snowball board */
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gpio@8012e000 {
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/* GPIOs 0 - 31 */
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gpio-line-names = "", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "",
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"AP_GPIO31";
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};
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gpio@8012e080 {
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/* GPIOs 32 - 63 */
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gpio-line-names = "USR PB", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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gpio@8000e000 {
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/* GPIOs 64 - 95 */
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gpio-line-names = "", "", "", "", "AP_GPIO68", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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gpio@8000e100 {
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/* GPIOs 128 - 159 */
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gpio-line-names = "", "", "", "", "", "", "", "",
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"", "", "", "", "IRQ_LAN", "RSTn_LAN",
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"USR_LED", "", "", "", "", "", "",
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"", "", "AP_GPIO151", "AP_GPIO152",
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"", "", "", "", "", "", "";
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};
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gpio@8000e180 {
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/* GPIOs 160 - 191 */
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gpio-line-names = "", "AP_GPIO161", "AP_GPIO162",
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"ACCELEROMETER_INT1_RDY",
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"ACCELEROMETER_INT2", "MAG_DRDY",
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"GYRO_DRDY", "RSTn_MLC", "RSTn_SLC",
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"GYRO_INT", "UART_WAKE", "GBF_RESET",
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"", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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gpio@8011e000 {
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/* GPIOs 192 - 223 */
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gpio-line-names = "HDTV_INTn", "", "", "", "HDTV_RST",
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"", "", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "", "",
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"WLAN_RESETN", "WLAN_IRQ", "MMC_EN",
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"MMC_CD", "", "", "", "", "";
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};
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gpio@8011e080 {
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/* GPIOs 224 - 255 */
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gpio-line-names = "", "", "", "", "SD_SEL", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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msp0: msp@80123000 {
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pinctrl-names = "default";
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pinctrl-0 = <&msp0txrxtfstck_a_1_default>;
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status = "okay";
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};
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msp1: msp@80124000 {
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pinctrl-names = "default";
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pinctrl-0 = <&msp1txrx_a_1_default>;
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status = "okay";
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};
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msp2: msp@80117000 {
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pinctrl-names = "default";
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pinctrl-0 = <&msp2_a_1_default>;
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};
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msp3: msp@80125000 {
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status = "okay";
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};
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external-bus@50000000 {
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status = "okay";
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ethernet@0 {
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compatible = "smsc,lan9115";
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reg = <0 0x10000>;
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interrupts = <12 IRQ_TYPE_EDGE_RISING>;
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interrupt-parent = <&gpio4>;
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vdd33a-supply = <&en_3v3_reg>;
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vddvario-supply = <&db8500_vape_reg>;
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pinctrl-names = "default";
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pinctrl-0 = <ð_snowball_mode>;
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reg-shift = <1>;
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reg-io-width = <2>;
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smsc,force-internal-phy;
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smsc,irq-active-high;
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smsc,irq-push-pull;
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clocks = <&prcc_pclk 3 0>;
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};
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};
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/* ST6G3244ME level translator for 1.8/2.9 V */
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vmmci: regulator-gpio {
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compatible = "regulator-gpio";
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/* GPIO228 SD_SEL */
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gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
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/* GPIO217 MMC_EN */
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enable-gpio = <&gpio6 25 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <2900000>;
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regulator-name = "mmci-reg";
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regulator-type = "voltage";
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startup-delay-us = <100>;
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states = <1800000 0x1
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2900000 0x0>;
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};
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// External Micro SD slot
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mmc@80126000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <4>;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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/* All direction control is used */
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st,sig-dir-cmd;
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st,sig-dir-dat0;
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st,sig-dir-dat2;
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st,sig-dir-dat31;
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st,sig-pin-fbclk;
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full-pwr-cycle;
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vmmc-supply = <&ab8500_ldo_aux3_reg>;
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vqmmc-supply = <&vmmci>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&mc0_a_1_default &sdi0_default_mode>;
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pinctrl-1 = <&mc0_a_1_sleep>;
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/* GPIO218 MMC_CD */
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cd-gpios = <&gpio6 26 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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// WLAN SDIO channel
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mmc@80118000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <4>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&mc1_a_1_default>;
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pinctrl-1 = <&mc1_a_1_sleep>;
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status = "okay";
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};
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// Unused PoP eMMC - register and put it to sleep by default */
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mmc@80005000 {
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arm,primecell-periphid = <0x10480180>;
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pinctrl-names = "default";
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pinctrl-0 = <&mc2_a_1_sleep>;
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status = "okay";
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};
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// On-board eMMC
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mmc@80114000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <8>;
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cap-mmc-highspeed;
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vmmc-supply = <&ab8500_ldo_aux2_reg>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&mc4_a_1_default>;
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pinctrl-1 = <&mc4_a_1_sleep>;
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status = "okay";
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};
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uart@80120000 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&u0_a_1_default>;
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pinctrl-1 = <&u0_a_1_sleep>;
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status = "okay";
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};
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/* This UART is unused and thus left disabled */
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uart@80121000 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&u1rxtx_a_1_default>;
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pinctrl-1 = <&u1rxtx_a_1_sleep>;
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};
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uart@80007000 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&u2rxtx_c_1_default>;
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pinctrl-1 = <&u2rxtx_c_1_sleep>;
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status = "okay";
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};
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i2c@80004000 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&i2c0_a_1_default>;
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pinctrl-1 = <&i2c0_a_1_sleep>;
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status = "okay";
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};
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i2c@80122000 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&i2c1_b_2_default>;
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pinctrl-1 = <&i2c1_b_2_sleep>;
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status = "okay";
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};
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i2c@80128000 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&i2c2_b_2_default>;
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pinctrl-1 = <&i2c2_b_2_sleep>;
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status = "okay";
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lsm303dlh@18 {
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/* Accelerometer */
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compatible = "st,lsm303dlh-accel";
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st,drdy-int-pin = <1>;
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reg = <0x18>;
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vdd-supply = <&ab8500_ldo_aux1_reg>;
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vddio-supply = <&db8500_vsmps2_reg>;
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pinctrl-names = "default";
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|
pinctrl-0 = <&accel_snowball_mode>;
|
|
interrupt-parent = <&gpio5>;
|
|
interrupts = <3 IRQ_TYPE_EDGE_RISING>, /* INT1 */
|
|
<4 IRQ_TYPE_EDGE_RISING>; /* INT2 */
|
|
};
|
|
lsm303dlh@1e {
|
|
/* Magnetometer */
|
|
compatible = "st,lsm303dlh-magn";
|
|
reg = <0x1e>;
|
|
vdd-supply = <&ab8500_ldo_aux1_reg>;
|
|
vddio-supply = <&db8500_vsmps2_reg>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&magneto_snowball_mode>;
|
|
interrupt-parent = <&gpio5>;
|
|
interrupts = <5 IRQ_TYPE_EDGE_RISING>; /* DRDY line */
|
|
};
|
|
l3g4200d@68 {
|
|
/* Gyroscope */
|
|
compatible = "st,l3g4200d-gyro";
|
|
st,drdy-int-pin = <2>;
|
|
reg = <0x68>;
|
|
vdd-supply = <&ab8500_ldo_aux1_reg>;
|
|
vddio-supply = <&db8500_vsmps2_reg>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&gyro_snowball_mode>;
|
|
interrupt-parent = <&gpio5>;
|
|
interrupts = <6 IRQ_TYPE_EDGE_RISING>, /* DRDY line */
|
|
<9 IRQ_TYPE_EDGE_RISING>; /* INT1 */
|
|
};
|
|
lsp001wm@5c {
|
|
/* Barometer/pressure sensor */
|
|
compatible = "st,lps001wp-press";
|
|
reg = <0x5c>;
|
|
vdd-supply = <&ab8500_ldo_aux1_reg>;
|
|
vddio-supply = <&db8500_vsmps2_reg>;
|
|
};
|
|
};
|
|
|
|
i2c@80110000 {
|
|
pinctrl-names = "default","sleep";
|
|
pinctrl-0 = <&i2c3_c_2_default>;
|
|
pinctrl-1 = <&i2c3_c_2_sleep>;
|
|
status = "okay";
|
|
};
|
|
|
|
spi@80002000 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&ssp0_snowball_mode>;
|
|
status = "okay";
|
|
};
|
|
|
|
prcmu@80157000 {
|
|
ab8500 {
|
|
ab8500-gpio {
|
|
/*
|
|
* AB8500 GPIOs are numbered starting from 1, so the first
|
|
* index 0 is what in the datasheet is called "GPIO1", and
|
|
* the second is "GPIO2" and so forth. Confusingly, the
|
|
* Snowball schematic then names the "GPIO2" line "PM_GPIO1".
|
|
* while later naming "GPIO4" as "PM_GPIO4".
|
|
*/
|
|
gpio-line-names = "", /* AB8500 GPIO1 */
|
|
"PM_GPIO1", /* AB8500 GPIO2 */
|
|
"WLAN_CLK_REQ", /* AB8500 GPIO3 */
|
|
"PM_GPIO4", /* AB8500 GPIO4 */
|
|
"", "", "", "", "", "", "", "", "", "", "",
|
|
"EN_3V6", /* AB8500 GPIO16 */
|
|
"", "", "", "" ,"", "", "", "", "",
|
|
"EN_3V3", /* AB8500 GPIO26 */
|
|
"", "", "", "", "", "", "", "", "", "", "", "", "",
|
|
"PM_GPIO40", /* AB8500 GPIO40 */
|
|
"PM_GPIO41", /* AB8500 GPIO41 */
|
|
"PM_GPIO42"; /* AB8500 GPIO42 */
|
|
};
|
|
|
|
ab8500_usb {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&usb_a_1_default>;
|
|
pinctrl-1 = <&usb_a_1_sleep>;
|
|
};
|
|
|
|
ext_regulators: ab8500-ext-regulators {
|
|
ab8500_ext1_reg: ab8500_ext1 {
|
|
regulator-name = "ab8500-ext-supply1";
|
|
};
|
|
|
|
ab8500_ext2_reg_reg: ab8500_ext2 {
|
|
regulator-name = "ab8500-ext-supply2";
|
|
};
|
|
|
|
ab8500_ext3_reg_reg: ab8500_ext3 {
|
|
regulator-name = "ab8500-ext-supply3";
|
|
};
|
|
};
|
|
|
|
ab8500-regulators {
|
|
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
|
|
regulator-name = "V-DISPLAY";
|
|
};
|
|
|
|
ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
|
|
regulator-name = "V-eMMC1";
|
|
};
|
|
|
|
ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
|
|
regulator-name = "V-MMC-SD";
|
|
};
|
|
|
|
ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
|
|
regulator-name = "V-INTCORE";
|
|
};
|
|
|
|
ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
|
|
regulator-name = "V-TVOUT";
|
|
};
|
|
|
|
ab8500_ldo_audio_reg: ab8500_ldo_audio {
|
|
regulator-name = "V-AUD";
|
|
};
|
|
|
|
ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
|
|
regulator-name = "V-AMIC1";
|
|
};
|
|
|
|
ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
|
|
regulator-name = "V-AMIC2";
|
|
};
|
|
|
|
ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
|
|
regulator-name = "V-DMIC";
|
|
};
|
|
|
|
ab8500_ldo_ana_reg: ab8500_ldo_ana {
|
|
regulator-name = "V-CSI/DSI";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
pinctrl {
|
|
/*
|
|
* Set this up using hogs, as time goes by and as seems fit, these
|
|
* can be moved over to being controlled by respective device.
|
|
*/
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&gbf_snowball_mode>,
|
|
<&wlan_snowball_mode>;
|
|
|
|
ethernet {
|
|
/*
|
|
* Mux in "SM" which is used for the
|
|
* SMSC911x Ethernet adapter
|
|
*/
|
|
eth_snowball_mode: eth_snowball {
|
|
snowball_mux {
|
|
function = "sm";
|
|
groups = "sm_b_1";
|
|
};
|
|
/* LAN IRQ pin */
|
|
snowball_cfg1 {
|
|
pins = "GPIO140_B11";
|
|
ste,config = <&in_nopull>;
|
|
};
|
|
/* LAN reset pin */
|
|
snowball_cfg2 {
|
|
pins = "GPIO141_C12";
|
|
ste,config = <&gpio_out_hi>;
|
|
};
|
|
|
|
};
|
|
};
|
|
sdi0 {
|
|
sdi0_default_mode: sdi0_default {
|
|
snowball_mux {
|
|
function = "mc0";
|
|
/* Add the DAT31 pin even if it is not really used */
|
|
groups = "mc0dat31dir_a_1";
|
|
};
|
|
snowball_cfg1 {
|
|
pins = "GPIO21_AB3"; /* DAT31DIR */
|
|
ste,config = <&out_hi>;
|
|
};
|
|
/* SD card detect GPIO pin, extend default state */
|
|
snowball_cfg2 {
|
|
pins = "GPIO218_AH11";
|
|
ste,config = <&gpio_in_pu>;
|
|
};
|
|
/* VMMCI level-shifter enable */
|
|
snowball_cfg3 {
|
|
pins = "GPIO217_AH12";
|
|
ste,config = <&gpio_out_hi>;
|
|
};
|
|
/* VMMCI level-shifter voltage select */
|
|
snowball_cfg4 {
|
|
pins = "GPIO228_AJ6";
|
|
ste,config = <&gpio_out_hi>;
|
|
};
|
|
};
|
|
};
|
|
ssp0 {
|
|
ssp0_snowball_mode: ssp0_snowball_default {
|
|
snowball_mux {
|
|
function = "ssp0";
|
|
groups = "ssp0_a_1";
|
|
};
|
|
snowball_cfg1 {
|
|
pins = "GPIO144_B13"; /* FRM */
|
|
ste,config = <&gpio_out_hi>;
|
|
};
|
|
snowball_cfg2 {
|
|
pins = "GPIO145_C13"; /* RXD */
|
|
ste,config = <&in_pd>;
|
|
};
|
|
snowball_cfg3 {
|
|
pins =
|
|
"GPIO146_D13", /* TXD */
|
|
"GPIO143_D12"; /* CLK */
|
|
ste,config = <&out_lo>;
|
|
};
|
|
|
|
};
|
|
};
|
|
gpio_led {
|
|
gpioled_snowball_mode: gpioled_default {
|
|
snowball_cfg1 {
|
|
pins = "GPIO142_C11";
|
|
ste,config = <&gpio_out_hi>;
|
|
};
|
|
|
|
};
|
|
};
|
|
accelerometer {
|
|
accel_snowball_mode: accel_snowball {
|
|
/* Accelerometer lines */
|
|
snowball_cfg1 {
|
|
pins =
|
|
"GPIO163_C20", /* ACCEL_IRQ1 */
|
|
"GPIO164_B21"; /* ACCEL_IRQ2 */
|
|
ste,config = <&gpio_in_pu>;
|
|
};
|
|
};
|
|
};
|
|
gyro {
|
|
gyro_snowball_mode: gyro_snowball {
|
|
snowball_cfg1 {
|
|
pins =
|
|
"GPIO166_A22", /* DRDY */
|
|
"GPIO169_D22"; /* INT */
|
|
ste,config = <&gpio_in_pu>;
|
|
};
|
|
};
|
|
};
|
|
magnetometer {
|
|
magneto_snowball_mode: magneto_snowball {
|
|
snowball_cfg1 {
|
|
pins = "GPIO165_C21"; /* MAG_DRDY */
|
|
ste,config = <&gpio_in_pu>;
|
|
};
|
|
};
|
|
};
|
|
gbf {
|
|
gbf_snowball_mode: gbf_snowball {
|
|
/*
|
|
* GBF (GPS, Bluetooth, FM-radio) interface,
|
|
* pull low to reset state
|
|
*/
|
|
snowball_cfg1 {
|
|
pins = "GPIO171_D23"; /* GBF_ENA_RESET */
|
|
ste,config = <&gpio_out_lo>;
|
|
};
|
|
};
|
|
};
|
|
wlan {
|
|
wlan_snowball_mode: wlan_snowball {
|
|
/*
|
|
* Activate this mode with the WLAN chip.
|
|
* These are plain GPIO pins used by WLAN
|
|
*/
|
|
snowball_cfg1 {
|
|
pins =
|
|
"GPIO161_D21", /* WLAN_PMU_EN */
|
|
"GPIO215_AH13"; /* WLAN_ENA */
|
|
ste,config = <&gpio_out_lo>;
|
|
};
|
|
snowball_cfg2 {
|
|
pins = "GPIO216_AG12"; /* WLAN_IRQ */
|
|
ste,config = <&gpio_in_pu>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
mcde@a0350000 {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&lcd_default_mode>;
|
|
pinctrl-1 = <&lcd_sleep_mode>;
|
|
};
|
|
};
|
|
};
|