Ahmad Fatoum a50b7926d0
ASoC: fsl_sai: implement 1:1 bclk:mclk ratio support
With higher channel counts, we may need higher clock rates.  Starting
with SAI v3.1 (i.MX8MM), we can bypass the divider and get a 1:1
bclk:mclk ratio. Add the necessary support.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20220302083428.3804687-8-s.hauer@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-03-07 13:13:10 +00:00
..
2022-01-04 14:59:37 +00:00