Eugen Hristev db2f44820a clk: at91: sam9x60-pll: adapt PMC_PLL_ACR default value
Product datasheet recommends different values for UPLL and PLLA analog control
register.
Adapt accordingly.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lkml.kernel.org/r/1573478913-19737-1-git-send-email-eugen.hristev@microchip.com
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-01-05 19:06:31 -08:00
..
2019-10-17 16:36:11 +02:00
2019-05-30 16:33:37 -07:00
2019-05-16 09:19:14 -07:00
2019-10-03 10:51:11 -07:00
2018-12-11 09:57:47 -08:00
2018-07-06 13:44:06 -07:00
2019-07-15 20:18:40 -07:00
2019-12-05 11:38:40 -08:00