We're going to want access to the atomic state for iterating the slave crtcs when enabling the port sync master crtc. Pass the atomic state all the way down. The alternative would be yet another encoder hook which we'll have to call after all the normal modeset stuff is done. Not really a fan of yet another hook just for this. Note that during readout state sanitation we are now going to pass NULL as the atomic state since we don't have one. We need to change that and then we can also s/crtc_state/crtc/ and s/conn_state/conn/ for the encoder hooks as well. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200313164831.5980-13-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
51 lines
2.1 KiB
C
51 lines
2.1 KiB
C
/* SPDX-License-Identifier: MIT */
|
|
/*
|
|
* Copyright © 2019 Intel Corporation
|
|
*/
|
|
|
|
#ifndef __INTEL_DDI_H__
|
|
#define __INTEL_DDI_H__
|
|
|
|
#include "intel_display.h"
|
|
|
|
struct drm_connector_state;
|
|
struct drm_i915_private;
|
|
struct intel_connector;
|
|
struct intel_crtc;
|
|
struct intel_crtc_state;
|
|
struct intel_dp;
|
|
struct intel_dpll_hw_state;
|
|
struct intel_encoder;
|
|
|
|
void intel_ddi_fdi_post_disable(struct intel_atomic_state *state,
|
|
struct intel_encoder *intel_encoder,
|
|
const struct intel_crtc_state *old_crtc_state,
|
|
const struct drm_connector_state *old_conn_state);
|
|
void hsw_fdi_link_train(struct intel_encoder *encoder,
|
|
const struct intel_crtc_state *crtc_state);
|
|
void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
|
|
bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
|
|
void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state);
|
|
void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
|
|
void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state);
|
|
void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state);
|
|
void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
|
|
const struct drm_connector_state *conn_state);
|
|
bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
|
|
void intel_ddi_get_config(struct intel_encoder *encoder,
|
|
struct intel_crtc_state *pipe_config);
|
|
void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state,
|
|
bool state);
|
|
void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
|
|
struct intel_crtc_state *crtc_state);
|
|
u32 bxt_signal_levels(struct intel_dp *intel_dp);
|
|
u32 ddi_signal_levels(struct intel_dp *intel_dp);
|
|
u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder);
|
|
u8 intel_ddi_dp_pre_emphasis_max(struct intel_encoder *encoder,
|
|
u8 voltage_swing);
|
|
int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
|
|
bool enable);
|
|
void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
|
|
|
|
#endif /* __INTEL_DDI_H__ */
|