John Linn dc568ec490 powerpc/virtex: add dts file for ML507 reference design
This new file adds support for the ML507 reference design.  The ML507
uses the Virtex 5 FXT FPGA which embeds a ppc440 core.

Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-04 00:57:59 -06:00
..
2008-01-17 14:57:09 +11:00
2007-09-19 21:13:16 -05:00
2007-06-07 22:21:31 +10:00
2008-06-09 13:42:25 +10:00
2008-04-17 01:01:40 -05:00
2007-12-11 13:46:15 +11:00
2008-04-01 20:43:07 +11:00
2007-09-14 01:33:23 +10:00
2007-09-14 01:33:23 +10:00

To extract the kernel vmlinux, System.map, .config or initrd from the zImage binary:

objcopy -j .kernel:vmlinux -O binary zImage vmlinux.gz
objcopy -j .kernel:System.map -O binary zImage System.map.gz
objcopy -j .kernel:.config -O binary zImage config.gz
objcopy -j .kernel:initrd -O binary zImage.initrd initrd.gz


	Peter