b20d9a73a3
The nx driver started out its life as a BE-only driver. However, somewhere along the way LE support was partially added. This never seems to have been extended all the way but it does trigger numerous warnings during build. This patch fixes all those warnings, but it doesn't mean that the driver will work on LE. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
567 lines
14 KiB
C
567 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* AES CCM routines supporting the Power 7+ Nest Accelerators driver
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*
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* Copyright (C) 2012 International Business Machines Inc.
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*
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* Author: Kent Yoder <yoder1@us.ibm.com>
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*/
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#include <crypto/internal/aead.h>
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#include <crypto/aes.h>
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#include <crypto/algapi.h>
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#include <crypto/scatterwalk.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/crypto.h>
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#include <asm/vio.h>
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#include "nx_csbcpb.h"
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#include "nx.h"
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static int ccm_aes_nx_set_key(struct crypto_aead *tfm,
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const u8 *in_key,
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unsigned int key_len)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&tfm->base);
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struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
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struct nx_csbcpb *csbcpb_aead = nx_ctx->csbcpb_aead;
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nx_ctx_init(nx_ctx, HCOP_FC_AES);
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switch (key_len) {
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case AES_KEYSIZE_128:
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NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);
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NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_128);
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nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_128];
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break;
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default:
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return -EINVAL;
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}
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csbcpb->cpb.hdr.mode = NX_MODE_AES_CCM;
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memcpy(csbcpb->cpb.aes_ccm.key, in_key, key_len);
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csbcpb_aead->cpb.hdr.mode = NX_MODE_AES_CCA;
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memcpy(csbcpb_aead->cpb.aes_cca.key, in_key, key_len);
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return 0;
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}
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static int ccm4309_aes_nx_set_key(struct crypto_aead *tfm,
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const u8 *in_key,
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unsigned int key_len)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&tfm->base);
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if (key_len < 3)
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return -EINVAL;
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key_len -= 3;
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memcpy(nx_ctx->priv.ccm.nonce, in_key + key_len, 3);
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return ccm_aes_nx_set_key(tfm, in_key, key_len);
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}
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static int ccm_aes_nx_setauthsize(struct crypto_aead *tfm,
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unsigned int authsize)
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{
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switch (authsize) {
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case 4:
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case 6:
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case 8:
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case 10:
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case 12:
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case 14:
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case 16:
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int ccm4309_aes_nx_setauthsize(struct crypto_aead *tfm,
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unsigned int authsize)
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{
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switch (authsize) {
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case 8:
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case 12:
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case 16:
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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/* taken from crypto/ccm.c */
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static int set_msg_len(u8 *block, unsigned int msglen, int csize)
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{
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__be32 data;
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memset(block, 0, csize);
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block += csize;
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if (csize >= 4)
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csize = 4;
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else if (msglen > (unsigned int)(1 << (8 * csize)))
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return -EOVERFLOW;
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data = cpu_to_be32(msglen);
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memcpy(block - csize, (u8 *)&data + 4 - csize, csize);
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return 0;
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}
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/* taken from crypto/ccm.c */
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static inline int crypto_ccm_check_iv(const u8 *iv)
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{
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/* 2 <= L <= 8, so 1 <= L' <= 7. */
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if (1 > iv[0] || iv[0] > 7)
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return -EINVAL;
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return 0;
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}
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/* based on code from crypto/ccm.c */
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static int generate_b0(u8 *iv, unsigned int assoclen, unsigned int authsize,
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unsigned int cryptlen, u8 *b0)
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{
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unsigned int l, lp, m = authsize;
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int rc;
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memcpy(b0, iv, 16);
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lp = b0[0];
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l = lp + 1;
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/* set m, bits 3-5 */
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*b0 |= (8 * ((m - 2) / 2));
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/* set adata, bit 6, if associated data is used */
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if (assoclen)
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*b0 |= 64;
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rc = set_msg_len(b0 + 16 - l, cryptlen, l);
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return rc;
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}
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static int generate_pat(u8 *iv,
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struct aead_request *req,
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struct nx_crypto_ctx *nx_ctx,
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unsigned int authsize,
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unsigned int nbytes,
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unsigned int assoclen,
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u8 *out)
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{
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struct nx_sg *nx_insg = nx_ctx->in_sg;
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struct nx_sg *nx_outsg = nx_ctx->out_sg;
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unsigned int iauth_len = 0;
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u8 tmp[16], *b1 = NULL, *b0 = NULL, *result = NULL;
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int rc;
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unsigned int max_sg_len;
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/* zero the ctr value */
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memset(iv + 15 - iv[0], 0, iv[0] + 1);
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/* page 78 of nx_wb.pdf has,
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* Note: RFC3610 allows the AAD data to be up to 2^64 -1 bytes
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* in length. If a full message is used, the AES CCA implementation
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* restricts the maximum AAD length to 2^32 -1 bytes.
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* If partial messages are used, the implementation supports
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* 2^64 -1 bytes maximum AAD length.
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*
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* However, in the cryptoapi's aead_request structure,
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* assoclen is an unsigned int, thus it cannot hold a length
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* value greater than 2^32 - 1.
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* Thus the AAD is further constrained by this and is never
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* greater than 2^32.
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*/
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if (!assoclen) {
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b0 = nx_ctx->csbcpb->cpb.aes_ccm.in_pat_or_b0;
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} else if (assoclen <= 14) {
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/* if associated data is 14 bytes or less, we do 1 GCM
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* operation on 2 AES blocks, B0 (stored in the csbcpb) and B1,
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* which is fed in through the source buffers here */
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b0 = nx_ctx->csbcpb->cpb.aes_ccm.in_pat_or_b0;
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b1 = nx_ctx->priv.ccm.iauth_tag;
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iauth_len = assoclen;
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} else if (assoclen <= 65280) {
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/* if associated data is less than (2^16 - 2^8), we construct
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* B1 differently and feed in the associated data to a CCA
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* operation */
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b0 = nx_ctx->csbcpb_aead->cpb.aes_cca.b0;
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b1 = nx_ctx->csbcpb_aead->cpb.aes_cca.b1;
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iauth_len = 14;
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} else {
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b0 = nx_ctx->csbcpb_aead->cpb.aes_cca.b0;
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b1 = nx_ctx->csbcpb_aead->cpb.aes_cca.b1;
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iauth_len = 10;
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}
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/* generate B0 */
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rc = generate_b0(iv, assoclen, authsize, nbytes, b0);
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if (rc)
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return rc;
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/* generate B1:
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* add control info for associated data
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* RFC 3610 and NIST Special Publication 800-38C
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*/
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if (b1) {
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memset(b1, 0, 16);
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if (assoclen <= 65280) {
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*(u16 *)b1 = assoclen;
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scatterwalk_map_and_copy(b1 + 2, req->src, 0,
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iauth_len, SCATTERWALK_FROM_SG);
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} else {
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*(u16 *)b1 = (u16)(0xfffe);
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*(u32 *)&b1[2] = assoclen;
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scatterwalk_map_and_copy(b1 + 6, req->src, 0,
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iauth_len, SCATTERWALK_FROM_SG);
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}
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}
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/* now copy any remaining AAD to scatterlist and call nx... */
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if (!assoclen) {
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return rc;
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} else if (assoclen <= 14) {
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unsigned int len = 16;
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nx_insg = nx_build_sg_list(nx_insg, b1, &len, nx_ctx->ap->sglen);
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if (len != 16)
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return -EINVAL;
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nx_outsg = nx_build_sg_list(nx_outsg, tmp, &len,
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nx_ctx->ap->sglen);
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if (len != 16)
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return -EINVAL;
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/* inlen should be negative, indicating to phyp that its a
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* pointer to an sg list */
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nx_ctx->op.inlen = (nx_ctx->in_sg - nx_insg) *
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sizeof(struct nx_sg);
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nx_ctx->op.outlen = (nx_ctx->out_sg - nx_outsg) *
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sizeof(struct nx_sg);
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NX_CPB_FDM(nx_ctx->csbcpb) |= NX_FDM_ENDE_ENCRYPT;
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NX_CPB_FDM(nx_ctx->csbcpb) |= NX_FDM_INTERMEDIATE;
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result = nx_ctx->csbcpb->cpb.aes_ccm.out_pat_or_mac;
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rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
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req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
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if (rc)
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return rc;
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atomic_inc(&(nx_ctx->stats->aes_ops));
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atomic64_add(assoclen, &nx_ctx->stats->aes_bytes);
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} else {
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unsigned int processed = 0, to_process;
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processed += iauth_len;
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/* page_limit: number of sg entries that fit on one page */
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max_sg_len = min_t(u64, nx_ctx->ap->sglen,
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nx_driver.of.max_sg_len/sizeof(struct nx_sg));
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max_sg_len = min_t(u64, max_sg_len,
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nx_ctx->ap->databytelen/NX_PAGE_SIZE);
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do {
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to_process = min_t(u32, assoclen - processed,
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nx_ctx->ap->databytelen);
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nx_insg = nx_walk_and_build(nx_ctx->in_sg,
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nx_ctx->ap->sglen,
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req->src, processed,
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&to_process);
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if ((to_process + processed) < assoclen) {
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NX_CPB_FDM(nx_ctx->csbcpb_aead) |=
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NX_FDM_INTERMEDIATE;
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} else {
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NX_CPB_FDM(nx_ctx->csbcpb_aead) &=
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~NX_FDM_INTERMEDIATE;
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}
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nx_ctx->op_aead.inlen = (nx_ctx->in_sg - nx_insg) *
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sizeof(struct nx_sg);
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result = nx_ctx->csbcpb_aead->cpb.aes_cca.out_pat_or_b0;
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rc = nx_hcall_sync(nx_ctx, &nx_ctx->op_aead,
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req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
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if (rc)
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return rc;
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memcpy(nx_ctx->csbcpb_aead->cpb.aes_cca.b0,
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nx_ctx->csbcpb_aead->cpb.aes_cca.out_pat_or_b0,
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AES_BLOCK_SIZE);
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NX_CPB_FDM(nx_ctx->csbcpb_aead) |= NX_FDM_CONTINUATION;
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atomic_inc(&(nx_ctx->stats->aes_ops));
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atomic64_add(assoclen, &nx_ctx->stats->aes_bytes);
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processed += to_process;
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} while (processed < assoclen);
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result = nx_ctx->csbcpb_aead->cpb.aes_cca.out_pat_or_b0;
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}
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memcpy(out, result, AES_BLOCK_SIZE);
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return rc;
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}
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static int ccm_nx_decrypt(struct aead_request *req,
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u8 *iv,
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unsigned int assoclen)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
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struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
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unsigned int nbytes = req->cryptlen;
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unsigned int authsize = crypto_aead_authsize(crypto_aead_reqtfm(req));
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struct nx_ccm_priv *priv = &nx_ctx->priv.ccm;
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unsigned long irq_flags;
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unsigned int processed = 0, to_process;
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int rc = -1;
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spin_lock_irqsave(&nx_ctx->lock, irq_flags);
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nbytes -= authsize;
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/* copy out the auth tag to compare with later */
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scatterwalk_map_and_copy(priv->oauth_tag,
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req->src, nbytes + req->assoclen, authsize,
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SCATTERWALK_FROM_SG);
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rc = generate_pat(iv, req, nx_ctx, authsize, nbytes, assoclen,
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csbcpb->cpb.aes_ccm.in_pat_or_b0);
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if (rc)
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goto out;
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do {
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/* to_process: the AES_BLOCK_SIZE data chunk to process in this
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* update. This value is bound by sg list limits.
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*/
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to_process = nbytes - processed;
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if ((to_process + processed) < nbytes)
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NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
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else
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NX_CPB_FDM(csbcpb) &= ~NX_FDM_INTERMEDIATE;
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NX_CPB_FDM(nx_ctx->csbcpb) &= ~NX_FDM_ENDE_ENCRYPT;
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rc = nx_build_sg_lists(nx_ctx, iv, req->dst, req->src,
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&to_process, processed + req->assoclen,
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csbcpb->cpb.aes_ccm.iv_or_ctr);
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if (rc)
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goto out;
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rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
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req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
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if (rc)
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goto out;
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/* for partial completion, copy following for next
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* entry into loop...
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*/
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memcpy(iv, csbcpb->cpb.aes_ccm.out_ctr, AES_BLOCK_SIZE);
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memcpy(csbcpb->cpb.aes_ccm.in_pat_or_b0,
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csbcpb->cpb.aes_ccm.out_pat_or_mac, AES_BLOCK_SIZE);
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memcpy(csbcpb->cpb.aes_ccm.in_s0,
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csbcpb->cpb.aes_ccm.out_s0, AES_BLOCK_SIZE);
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NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;
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/* update stats */
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atomic_inc(&(nx_ctx->stats->aes_ops));
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atomic64_add(be32_to_cpu(csbcpb->csb.processed_byte_count),
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&(nx_ctx->stats->aes_bytes));
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processed += to_process;
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} while (processed < nbytes);
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rc = crypto_memneq(csbcpb->cpb.aes_ccm.out_pat_or_mac, priv->oauth_tag,
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authsize) ? -EBADMSG : 0;
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out:
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spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
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return rc;
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}
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static int ccm_nx_encrypt(struct aead_request *req,
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u8 *iv,
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unsigned int assoclen)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
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struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
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unsigned int nbytes = req->cryptlen;
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unsigned int authsize = crypto_aead_authsize(crypto_aead_reqtfm(req));
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unsigned long irq_flags;
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unsigned int processed = 0, to_process;
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int rc = -1;
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spin_lock_irqsave(&nx_ctx->lock, irq_flags);
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rc = generate_pat(iv, req, nx_ctx, authsize, nbytes, assoclen,
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csbcpb->cpb.aes_ccm.in_pat_or_b0);
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if (rc)
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goto out;
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do {
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/* to process: the AES_BLOCK_SIZE data chunk to process in this
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* update. This value is bound by sg list limits.
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*/
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to_process = nbytes - processed;
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if ((to_process + processed) < nbytes)
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NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
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else
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NX_CPB_FDM(csbcpb) &= ~NX_FDM_INTERMEDIATE;
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NX_CPB_FDM(csbcpb) |= NX_FDM_ENDE_ENCRYPT;
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rc = nx_build_sg_lists(nx_ctx, iv, req->dst, req->src,
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&to_process, processed + req->assoclen,
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csbcpb->cpb.aes_ccm.iv_or_ctr);
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if (rc)
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goto out;
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rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
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req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
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if (rc)
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goto out;
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/* for partial completion, copy following for next
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* entry into loop...
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*/
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memcpy(iv, csbcpb->cpb.aes_ccm.out_ctr, AES_BLOCK_SIZE);
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memcpy(csbcpb->cpb.aes_ccm.in_pat_or_b0,
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csbcpb->cpb.aes_ccm.out_pat_or_mac, AES_BLOCK_SIZE);
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memcpy(csbcpb->cpb.aes_ccm.in_s0,
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csbcpb->cpb.aes_ccm.out_s0, AES_BLOCK_SIZE);
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NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;
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/* update stats */
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atomic_inc(&(nx_ctx->stats->aes_ops));
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atomic64_add(be32_to_cpu(csbcpb->csb.processed_byte_count),
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&(nx_ctx->stats->aes_bytes));
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processed += to_process;
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} while (processed < nbytes);
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/* copy out the auth tag */
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scatterwalk_map_and_copy(csbcpb->cpb.aes_ccm.out_pat_or_mac,
|
|
req->dst, nbytes + req->assoclen, authsize,
|
|
SCATTERWALK_TO_SG);
|
|
|
|
out:
|
|
spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
|
|
return rc;
|
|
}
|
|
|
|
static int ccm4309_aes_nx_encrypt(struct aead_request *req)
|
|
{
|
|
struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
|
|
struct nx_gcm_rctx *rctx = aead_request_ctx(req);
|
|
u8 *iv = rctx->iv;
|
|
|
|
iv[0] = 3;
|
|
memcpy(iv + 1, nx_ctx->priv.ccm.nonce, 3);
|
|
memcpy(iv + 4, req->iv, 8);
|
|
|
|
return ccm_nx_encrypt(req, iv, req->assoclen - 8);
|
|
}
|
|
|
|
static int ccm_aes_nx_encrypt(struct aead_request *req)
|
|
{
|
|
int rc;
|
|
|
|
rc = crypto_ccm_check_iv(req->iv);
|
|
if (rc)
|
|
return rc;
|
|
|
|
return ccm_nx_encrypt(req, req->iv, req->assoclen);
|
|
}
|
|
|
|
static int ccm4309_aes_nx_decrypt(struct aead_request *req)
|
|
{
|
|
struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
|
|
struct nx_gcm_rctx *rctx = aead_request_ctx(req);
|
|
u8 *iv = rctx->iv;
|
|
|
|
iv[0] = 3;
|
|
memcpy(iv + 1, nx_ctx->priv.ccm.nonce, 3);
|
|
memcpy(iv + 4, req->iv, 8);
|
|
|
|
return ccm_nx_decrypt(req, iv, req->assoclen - 8);
|
|
}
|
|
|
|
static int ccm_aes_nx_decrypt(struct aead_request *req)
|
|
{
|
|
int rc;
|
|
|
|
rc = crypto_ccm_check_iv(req->iv);
|
|
if (rc)
|
|
return rc;
|
|
|
|
return ccm_nx_decrypt(req, req->iv, req->assoclen);
|
|
}
|
|
|
|
struct aead_alg nx_ccm_aes_alg = {
|
|
.base = {
|
|
.cra_name = "ccm(aes)",
|
|
.cra_driver_name = "ccm-aes-nx",
|
|
.cra_priority = 300,
|
|
.cra_flags = CRYPTO_ALG_NEED_FALLBACK,
|
|
.cra_blocksize = 1,
|
|
.cra_ctxsize = sizeof(struct nx_crypto_ctx),
|
|
.cra_module = THIS_MODULE,
|
|
},
|
|
.init = nx_crypto_ctx_aes_ccm_init,
|
|
.exit = nx_crypto_ctx_aead_exit,
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
.maxauthsize = AES_BLOCK_SIZE,
|
|
.setkey = ccm_aes_nx_set_key,
|
|
.setauthsize = ccm_aes_nx_setauthsize,
|
|
.encrypt = ccm_aes_nx_encrypt,
|
|
.decrypt = ccm_aes_nx_decrypt,
|
|
};
|
|
|
|
struct aead_alg nx_ccm4309_aes_alg = {
|
|
.base = {
|
|
.cra_name = "rfc4309(ccm(aes))",
|
|
.cra_driver_name = "rfc4309-ccm-aes-nx",
|
|
.cra_priority = 300,
|
|
.cra_flags = CRYPTO_ALG_NEED_FALLBACK,
|
|
.cra_blocksize = 1,
|
|
.cra_ctxsize = sizeof(struct nx_crypto_ctx),
|
|
.cra_module = THIS_MODULE,
|
|
},
|
|
.init = nx_crypto_ctx_aes_ccm_init,
|
|
.exit = nx_crypto_ctx_aead_exit,
|
|
.ivsize = 8,
|
|
.maxauthsize = AES_BLOCK_SIZE,
|
|
.setkey = ccm4309_aes_nx_set_key,
|
|
.setauthsize = ccm4309_aes_nx_setauthsize,
|
|
.encrypt = ccm4309_aes_nx_encrypt,
|
|
.decrypt = ccm4309_aes_nx_decrypt,
|
|
};
|