Vineet Gupta ff1c0b6a79 ARC: [plat-sim] unbork non default CONFIG_LINUX_LINK_BASE ...

HIGHMEM support bumped the default memory size for nsim platform to 1G.
Thus total memory ended at the very edge of start of peripherals address
space. With linux link base shifted, memory started bleeding into
peripheral space which caused early boot bad_page spew !

Fixes: 29e332261d2 ("ARC: mm: HIGHMEM: populate high memory from DT")
Reported-by: Anton Kolesov <akolesov@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

2015-12-17 11:06:43 +05:30

..

abilis_tb10x.dtsi

dmaengine: dw: define DW_DMA_MAX_NR_MASTERS

2015-02-04 22:39:44 -08:00

abilis_tb100_dvk.dts

ARC: [TB10x] Updates for GPIO and pinctrl

2013-11-11 09:57:44 +05:30

abilis_tb100.dtsi

ARC: [TB10x] Updates for GPIO and pinctrl

2013-11-11 09:57:44 +05:30

abilis_tb101_dvk.dts

ARC: [TB10x] Updates for GPIO and pinctrl

2013-11-11 09:57:44 +05:30

abilis_tb101.dtsi

ARC: [TB10x] Updates for GPIO and pinctrl

2013-11-11 09:57:44 +05:30

axc001.dtsi

ARC: Ensure DT mem base is same as what kernel is built with

2015-10-28 16:13:42 +05:30

axc003_idu.dtsi

ARC: Ensure DT mem base is same as what kernel is built with

2015-10-28 16:13:42 +05:30

axc003.dtsi

ARC: Ensure DT mem base is same as what kernel is built with

2015-10-28 16:13:42 +05:30

axs10x_mb.dtsi

ARC: [axs10x] cap ethernet phy to 100 Mbit/sec

2015-12-07 19:40:03 +05:30

axs101.dts

ARC: [axs101] support early 8250 uart

2015-06-19 18:09:30 +05:30

axs103_idu.dts

ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores

2015-06-25 06:00:20 +05:30

axs103.dts

ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores

2015-06-25 06:00:20 +05:30

Makefile

arc: enable building of all dtbs

2015-10-27 16:12:13 -05:00

nsim_700.dts

ARC: [plat_arcfpga]->[plat_sim]

2015-06-19 18:09:26 +05:30

nsim_hs_idu.dts

ARCv2: [nsim*hs*] Support simulation platforms for HS38x cores

2015-06-25 06:00:19 +05:30

nsim_hs.dts

ARC: [plat-sim] unbork non default CONFIG_LINUX_LINK_BASE

2015-12-17 11:06:43 +05:30

nsimosci_hs_idu.dts

ARCv2: [nsim*hs*] Support simulation platforms for HS38x cores

2015-06-25 06:00:19 +05:30

nsimosci_hs.dts

ARCv2: [nsim*hs*] Support simulation platforms for HS38x cores

2015-06-25 06:00:19 +05:30

nsimosci.dts

ARC: [nsimosci] move peripherals to match model to FPGA

2014-12-15 11:24:58 +05:30

skeleton.dtsi

ARC: Ensure DT mem base is same as what kernel is built with

2015-10-28 16:13:42 +05:30

vdk_axc003_idu.dtsi

ARC: Ensure DT mem base is same as what kernel is built with

2015-10-28 16:13:42 +05:30

vdk_axc003.dtsi

ARC: Ensure DT mem base is same as what kernel is built with

2015-10-28 16:13:42 +05:30

vdk_axs10x_mb.dtsi

ARCv2: [vdk] dts files and defconfig for HS38 VDK

2015-06-25 06:00:21 +05:30

vdk_hs38_smp.dts

ARCv2: [vdk] dts files and defconfig for HS38 VDK

2015-06-25 06:00:21 +05:30

vdk_hs38.dts

ARCv2: [vdk] dts files and defconfig for HS38 VDK

2015-06-25 06:00:21 +05:30