Tiezhu Yang 09d97da660 MIPS: Only define pci_remap_iospace() for Ralink
After commit 9f76779f2418 ("MIPS: implement architecture-specific
'pci_remap_iospace()'"), there exists the following warning on the
Loongson64 platform:

    loongson-pci 1a000000.pci:       IO 0x0018020000..0x001803ffff -> 0x0000020000
    loongson-pci 1a000000.pci:      MEM 0x0040000000..0x007fffffff -> 0x0040000000
    ------------[ cut here ]------------
    WARNING: CPU: 2 PID: 1 at arch/mips/pci/pci-generic.c:55 pci_remap_iospace+0x84/0x90
    resource start address is not zero
    ...
    Call Trace:
    [<ffffffff8020dc78>] show_stack+0x40/0x120
    [<ffffffff80cf4a0c>] dump_stack_lvl+0x58/0x74
    [<ffffffff8023a0b0>] __warn+0xe0/0x110
    [<ffffffff80cee02c>] warn_slowpath_fmt+0xa4/0xd0
    [<ffffffff80cecf24>] pci_remap_iospace+0x84/0x90
    [<ffffffff807f9864>] devm_pci_remap_iospace+0x5c/0xb8
    [<ffffffff808121b0>] devm_of_pci_bridge_init+0x178/0x1f8
    [<ffffffff807f4000>] devm_pci_alloc_host_bridge+0x78/0x98
    [<ffffffff80819454>] loongson_pci_probe+0x34/0x160
    [<ffffffff809203cc>] platform_probe+0x6c/0xe0
    [<ffffffff8091d5d4>] really_probe+0xbc/0x340
    [<ffffffff8091d8f0>] __driver_probe_device+0x98/0x110
    [<ffffffff8091d9b8>] driver_probe_device+0x50/0x118
    [<ffffffff8091dea0>] __driver_attach+0x80/0x118
    [<ffffffff8091b280>] bus_for_each_dev+0x80/0xc8
    [<ffffffff8091c6d8>] bus_add_driver+0x130/0x210
    [<ffffffff8091ead4>] driver_register+0x8c/0x150
    [<ffffffff80200a8c>] do_one_initcall+0x54/0x288
    [<ffffffff811a5320>] kernel_init_freeable+0x27c/0x2e4
    [<ffffffff80cfc380>] kernel_init+0x2c/0x134
    [<ffffffff80205a2c>] ret_from_kernel_thread+0x14/0x1c
    ---[ end trace e4a0efe10aa5cce6 ]---
    loongson-pci 1a000000.pci: error -19: failed to map resource [io  0x20000-0x3ffff]

We can see that the resource start address is 0x0000020000, because
the ISA Bridge used the zero address which is defined in the dts file
arch/mips/boot/dts/loongson/ls7a-pch.dtsi:

    ISA Bridge: /bus@10000000/isa@18000000
    IO 0x0000000018000000..0x000000001801ffff  ->  0x0000000000000000

Based on the above analysis, the architecture-specific pci_remap_iospace()
is not suitable for Loongson64, we should only define pci_remap_iospace()
for Ralink on MIPS based on the commit background.

Fixes: 9f76779f2418 ("MIPS: implement architecture-specific 'pci_remap_iospace()'")
Suggested-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Tested-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-09 10:22:24 +01:00

149 lines
3.8 KiB
C

/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#ifndef _ASM_PCI_H
#define _ASM_PCI_H
#include <linux/mm.h>
#ifdef __KERNEL__
/*
* This file essentially defines the interface between board
* specific PCI code and MIPS common PCI code. Should potentially put
* into include/asm/pci.h file.
*/
#include <linux/ioport.h>
#include <linux/list.h>
#include <linux/of.h>
#ifdef CONFIG_PCI_DRIVERS_LEGACY
/*
* Each pci channel is a top-level PCI bus seem by CPU. A machine with
* multiple PCI channels may have multiple PCI host controllers or a
* single controller supporting multiple channels.
*/
struct pci_controller {
struct list_head list;
struct pci_bus *bus;
struct device_node *of_node;
struct pci_ops *pci_ops;
struct resource *mem_resource;
unsigned long mem_offset;
struct resource *io_resource;
unsigned long io_offset;
unsigned long io_map_base;
#ifndef CONFIG_PCI_DOMAINS_GENERIC
unsigned int index;
/* For compatibility with current (as of July 2003) pciutils
and XFree86. Eventually will be removed. */
unsigned int need_domain_info;
#endif
/* Optional access methods for reading/writing the bus number
of the PCI controller */
int (*get_busno)(void);
void (*set_busno)(int busno);
};
/*
* Used by boards to register their PCI busses before the actual scanning.
*/
extern void register_pci_controller(struct pci_controller *hose);
/*
* board supplied pci irq fixup routine
*/
extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
/* Do platform specific device initialization at pci_enable_device() time */
extern int pcibios_plat_dev_init(struct pci_dev *dev);
extern char * (*pcibios_plat_setup)(char *str);
#ifdef CONFIG_OF
/* this function parses memory ranges from a device node */
extern void pci_load_of_ranges(struct pci_controller *hose,
struct device_node *node);
#else
static inline void pci_load_of_ranges(struct pci_controller *hose,
struct device_node *node) {}
#endif
#ifdef CONFIG_PCI_DOMAINS_GENERIC
static inline void set_pci_need_domain_info(struct pci_controller *hose,
int need_domain_info)
{
/* nothing to do */
}
#elif defined(CONFIG_PCI_DOMAINS)
static inline void set_pci_need_domain_info(struct pci_controller *hose,
int need_domain_info)
{
hose->need_domain_info = need_domain_info;
}
#endif /* CONFIG_PCI_DOMAINS */
#endif
/* Can be used to override the logic in pci_scan_bus for skipping
already-configured bus numbers - to be used for buggy BIOSes
or architectures with incomplete PCI setup by the loader */
static inline unsigned int pcibios_assign_all_busses(void)
{
return 1;
}
extern unsigned long PCIBIOS_MIN_IO;
extern unsigned long PCIBIOS_MIN_MEM;
#define PCIBIOS_MIN_CARDBUS_IO 0x4000
#define HAVE_PCI_MMAP
#define ARCH_GENERIC_PCI_MMAP_RESOURCE
/*
* Dynamic DMA mapping stuff.
* MIPS has everything mapped statically.
*/
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/scatterlist.h>
#include <linux/string.h>
#include <asm/io.h>
#ifdef CONFIG_PCI_DOMAINS_GENERIC
static inline int pci_proc_domain(struct pci_bus *bus)
{
return pci_domain_nr(bus);
}
#elif defined(CONFIG_PCI_DOMAINS)
#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
static inline int pci_proc_domain(struct pci_bus *bus)
{
struct pci_controller *hose = bus->sysdata;
return hose->need_domain_info;
}
#endif /* CONFIG_PCI_DOMAINS */
#endif /* __KERNEL__ */
/* Do platform specific device initialization at pci_enable_device() time */
extern int pcibios_plat_dev_init(struct pci_dev *dev);
/* Chances are this interrupt is wired PC-style ... */
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
{
return channel ? 15 : 14;
}
#endif /* _ASM_PCI_H */