linux/arch/riscv
Palmer Dabbelt de57ecc476
RISC-V: Add some comments about the shadow and overflow stacks
It took me a while to page all this back in when trying to review the
recent spin_shadow_stack, so I figured I'd just write up some comments.

Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Link: https://lore.kernel.org/r/20221130023515.20217-2-palmer@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-12-12 09:30:35 -08:00
..
boot RISC-V Patches for the 5.13 Merge Window, Part 1 2021-05-06 09:24:18 -07:00
configs RISC-V: Enable Microchip PolarFire ICICLE SoC 2021-04-26 08:31:32 -07:00
errata riscv: sifive: Apply errata "cip-1200" patch 2021-04-26 08:24:58 -07:00
include riscv: fix race when vmap stack overflow 2022-11-29 18:16:55 -08:00
kernel RISC-V: Add some comments about the shadow and overflow stacks 2022-12-12 09:30:35 -08:00
lib riscv: Add support for function error injection 2021-01-14 15:09:09 -08:00
mm riscv: Introduce structure that group all variables regarding kernel mapping 2021-07-05 18:04:00 -07:00
net riscv: bpf: Avoid breaking W^X 2021-04-26 08:25:14 -07:00
Kbuild
Kconfig riscv: add VMAP_STACK overflow detection 2021-07-06 12:11:38 -07:00
Kconfig.debug
Kconfig.erratas riscv: enable SiFive errata CIP-453 and CIP-1200 Kconfig only if CONFIG_64BIT=y 2021-05-06 09:40:13 -07:00
Kconfig.socs RISC-V Patches for the 5.13 Merge Window, Part 1 2021-05-06 09:24:18 -07:00
Makefile RISC-V: enable XIP 2021-04-26 08:31:28 -07:00