4205a89b80
We're about to need to allocate hardening slots from other parts of the kernel (in order to support ARM64_HARDEN_EL2_VECTORS). Turn the counter into an atomic_t and make it available to the rest of the kernel. Also add BP_HARDEN_EL2_SLOTS as the number of slots instead of the hardcoded 4... Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
103 lines
2.3 KiB
ArmAsm
103 lines
2.3 KiB
ArmAsm
/*
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* Contains CPU specific branch predictor invalidation sequences
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*
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* Copyright (C) 2018 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/linkage.h>
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#include <linux/arm-smccc.h>
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#include <asm/alternative.h>
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#include <asm/mmu.h>
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.macro hyp_ventry
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.align 7
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1: .rept 27
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nop
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.endr
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/*
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* The default sequence is to directly branch to the KVM vectors,
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* using the computed offset. This applies for VHE as well as
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* !ARM64_HARDEN_EL2_VECTORS.
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*
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* For ARM64_HARDEN_EL2_VECTORS configurations, this gets replaced
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* with:
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*
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* stp x0, x1, [sp, #-16]!
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* movz x0, #(addr & 0xffff)
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* movk x0, #((addr >> 16) & 0xffff), lsl #16
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* movk x0, #((addr >> 32) & 0xffff), lsl #32
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* br x0
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*
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* Where addr = kern_hyp_va(__kvm_hyp_vector) + vector-offset + 4.
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* See kvm_patch_vector_branch for details.
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*/
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alternative_cb kvm_patch_vector_branch
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b __kvm_hyp_vector + (1b - 0b)
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nop
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nop
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nop
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nop
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alternative_cb_end
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.endm
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.macro generate_vectors
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0:
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.rept 16
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hyp_ventry
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.endr
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.org 0b + SZ_2K // Safety measure
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.endm
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.text
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.pushsection .hyp.text, "ax"
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.align 11
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ENTRY(__bp_harden_hyp_vecs_start)
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.rept BP_HARDEN_EL2_SLOTS
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generate_vectors
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.endr
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ENTRY(__bp_harden_hyp_vecs_end)
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.popsection
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ENTRY(__qcom_hyp_sanitize_link_stack_start)
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stp x29, x30, [sp, #-16]!
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.rept 16
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bl . + 4
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.endr
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ldp x29, x30, [sp], #16
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ENTRY(__qcom_hyp_sanitize_link_stack_end)
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.macro smccc_workaround_1 inst
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sub sp, sp, #(8 * 4)
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stp x2, x3, [sp, #(8 * 0)]
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stp x0, x1, [sp, #(8 * 2)]
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mov w0, #ARM_SMCCC_ARCH_WORKAROUND_1
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\inst #0
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ldp x2, x3, [sp, #(8 * 0)]
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ldp x0, x1, [sp, #(8 * 2)]
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add sp, sp, #(8 * 4)
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.endm
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ENTRY(__smccc_workaround_1_smc_start)
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smccc_workaround_1 smc
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ENTRY(__smccc_workaround_1_smc_end)
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ENTRY(__smccc_workaround_1_hvc_start)
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smccc_workaround_1 hvc
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ENTRY(__smccc_workaround_1_hvc_end)
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