39a1a8941b
Older versions of the Juno *SoC* TRM [1] recommended that the UART clock source should be 7.2738 MHz, whereas the *system* TRM [2] stated a more correct value of 7.3728 MHz. Somehow the wrong value managed to end up in our DT. Doing a prime factorisation, a modulo divide by 115200 and trying to buy a 7.2738 MHz crystal at your favourite electronics dealer suggest that the old value was actually a typo. The actual UART clock is driven by a PLL, configured via a parameter in some board.txt file in the firmware, which reads 7.37 MHz (sic!). Fix this to correct the baud rate divisor calculation on the Juno board. [1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0515b.b/DDI0515B_b_juno_arm_development_platform_soc_trm.pdf [2] http://infocenter.arm.com/help/topic/com.arm.doc.100113_0000_07_en/arm_versatile_express_juno_development_platform_(v2m_juno)_technical_reference_manual_100113_0000_07_en.pdf Fixes: 71f867ec130e ("arm64: Add Juno board device tree.") Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
46 lines
940 B
Plaintext
46 lines
940 B
Plaintext
/*
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* ARM Juno Platform clocks
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*
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* Copyright (c) 2013-2014 ARM Ltd
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*
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* This file is licensed under a dual GPLv2 or BSD license.
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*
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*/
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/ {
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/* SoC fixed clocks */
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soc_uartclk: refclk7372800hz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <7372800>;
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clock-output-names = "juno:uartclk";
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};
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soc_usb48mhz: clk48mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <48000000>;
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clock-output-names = "clk48mhz";
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};
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soc_smc50mhz: clk50mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "smc_clk";
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};
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soc_refclk100mhz: refclk100mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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clock-output-names = "apb_pclk";
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};
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soc_faxiclk: refclk400mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <400000000>;
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clock-output-names = "faxi_clk";
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};
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};
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