chen gong e3cd03603d drm/amdgpu: read gfx register using RREG32_KIQ macro ...

Reading CP_MEM_SLP_CNTL register with RREG32_SOC15 macro will lead to
hang when GPU is in "gfxoff" state.
I do a uniform substitution here.

Signed-off-by: chen gong <curry.gong@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2020-01-22 16:34:29 -05:00

..

drm

drm/amdgpu: read gfx register using RREG32_KIQ macro

2020-01-22 16:34:29 -05:00

host1x

drm/tegra: Changes for v5.6-rc1

2020-01-15 16:21:28 +10:00

ipu-v3

gpu: ipu-v3: image-convert: only sample into the next tile if necessary

2019-08-19 16:25:30 +02:00

vga

vga: Fix Kconfig indentation

2019-11-20 17:40:32 +01:00

Makefile

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