linux/drivers/cxl/core
Yao Xingtao 84328c5ace cxl/region: check interleave capability
Since interleave capability is not verified, if the interleave
capability of a target does not match the region need, committing decoder
should have failed at the device end.

In order to checkout this error as quickly as possible, driver needs
to check the interleave capability of target during attaching it to
region.

Per CXL specification r3.1(8.2.4.20.1 CXL HDM Decoder Capability Register),
bits 11 and 12 indicate the capability to establish interleaving in 3, 6,
12 and 16 ways. If these bits are not set, the target cannot be attached to
a region utilizing such interleave ways.

Additionally, bits 8 and 9 represent the capability of the bits used for
interleaving in the address, Linux tracks this in the cxl_port
interleave_mask.

Per CXL specification r3.1(8.2.4.20.13 Decoder Protection):
  eIW means encoded Interleave Ways.
  eIG means encoded Interleave Granularity.

  in HPA:
  if eIW is 0 or 8 (interleave ways: 1, 3), all the bits of HPA are used,
  the interleave bits are none, the following check is ignored.

  if eIW is less than 8 (interleave ways: 2, 4, 8, 16), the interleave bits
  start at bit position eIG + 8 and end at eIG + eIW + 8 - 1.

  if eIW is greater than 8 (interleave ways: 6, 12), the interleave bits
  start at bit position eIG + 8 and end at eIG + eIW - 1.

  if the interleave mask is insufficient to cover the required interleave
  bits, the target cannot be attached to the region.

Fixes: 384e624bb2 ("cxl/region: Attach endpoint decoders")
Signed-off-by: Yao Xingtao <yaoxt.fnst@fujitsu.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://patch.msgid.link/20240614084755.59503-2-yaoxt.fnst@fujitsu.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
2024-06-25 14:45:27 -07:00
..
cdat.c cxl: Consolidate dport access_coordinate ->hb_coord and ->sw_coord into ->coord 2024-04-08 08:25:21 -07:00
core.h cxl/region: Move cxl_trace_hpa() work to the region driver 2024-04-30 12:24:42 -07:00
hdm.c cxl/region: check interleave capability 2024-06-25 14:45:27 -07:00
Makefile cxl: Add callback to parse the DSMAS subtables from CDAT 2023-12-22 14:33:10 -08:00
mbox.c Merge remote-tracking branch 'cxl/for-6.10/dpa-to-hpa' into cxl-for-next 2024-04-30 13:45:43 -07:00
memdev.c cxl/region: Move cxl_dpa_to_region() work to the region driver 2024-04-30 12:24:42 -07:00
pci.c cxl: Add post-reset warning if reset results in loss of previously committed HDM decoders 2024-05-08 13:25:46 -05:00
pmem.c cxl/mem: Fix no cxl_nvd during pmem region auto-assembling 2024-06-18 16:56:50 -07:00
pmu.c cxl/pmu: Ensure put_device on pmu devices 2023-12-14 21:54:45 -08:00
port.c cxl: Fix cxl_endpoint_get_perf_coordinate() support for RCH 2024-04-29 09:03:26 -07:00
region.c cxl/region: check interleave capability 2024-06-25 14:45:27 -07:00
regs.c pci-v6.10-changes 2024-05-21 10:09:28 -07:00
suspend.c PM: CXL: Disable suspend 2022-04-22 16:09:42 -07:00
trace.c cxl/region: Move cxl_trace_hpa() work to the region driver 2024-04-30 12:24:42 -07:00
trace.h tracing/treewide: Remove second parameter of __assign_str() 2024-05-22 20:14:47 -04:00