Chen-Yu Tsai e4c6d6c11b clk: sunxi: Add Allwinner A20/A31 GMAC clock unit ...

The Allwinner A20/A31 clock module controls the transmit clock source
and interface type of the GMAC ethernet controller. Model this as
a single clock for GMAC drivers to use.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Emilio López <emilio@elopez.com.ar>

2014-02-18 10:34:28 -03:00

..

clk-factors.c

clk: sunxi: register factors clocks behind composite

2013-12-28 17:07:42 -03:00

clk-factors.h

clk: sunxi: register factors clocks behind composite

2013-12-28 17:07:42 -03:00

clk-sunxi.c

clk: sunxi: Add Allwinner A20/A31 GMAC clock unit

2014-02-18 10:34:28 -03:00

Makefile

clk: arm: sunxi: Add a new clock driver for sunxi SOCs

2013-03-27 08:35:34 -07:00