Barry Song e5598a855b ARM: CSR: PM: save/restore timer status in suspend cycle ...

SiRFprimaII will lose power in deepsleep mode except rtc, pmu and sdram
self-refresh.
This patch saves timer-related registers while suspending and restore
them while resuming.

Signed-off-by: Barry Song <baohua.song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

2011-09-21 22:50:08 +08:00

..

include/mach

…

clock.c

ARM: CSR: add missing sentinels to of_device_id tables

2011-09-11 09:11:26 +08:00

common.h

ARM: CSR: mapping early DEBUG_LL uart

2011-07-09 07:20:51 +08:00

irq.c

ARM: CSR: IRQ: add simple irq_domain so that hw irq can map to Linux

2011-09-11 09:15:09 +08:00

l2x0.c

ARM: CSR: initializing L2 cache

2011-07-09 07:21:53 +08:00

lluart.c

ARM: CSR: mapping early DEBUG_LL uart

2011-07-09 07:20:51 +08:00

Makefile

ARM: CSR: add rtc i/o bridge interface for SiRFprimaII

2011-09-11 09:17:53 +08:00

Makefile.boot

…

prima2.c

ARM: CSR: mapping early DEBUG_LL uart

2011-07-09 07:20:51 +08:00

rstc.c

ARM: CSR: add missing sentinels to of_device_id tables

2011-09-11 09:11:26 +08:00

rtciobrg.c

ARM: CSR: add rtc i/o bridge interface for SiRFprimaII

2011-09-11 09:17:53 +08:00

timer.c

ARM: CSR: PM: save/restore timer status in suspend cycle

2011-09-21 22:50:08 +08:00