e64f737ad7
Right now the alternatives need to be explicitly enabled and erratas are limited to SiFive ones. We want to use alternatives not only for patching soc erratas, but in the future also for handling different behaviour depending on the existence of future extensions. So move the core alternatives over to the kernel subdirectory and move the CONFIG_RISCV_ALTERNATIVE to be a hidden symbol which we expect relevant erratas and extensions to just select if needed. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Link: https://lore.kernel.org/r/20220511192921.2223629-2-heiko@sntech.de Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
184 lines
3.9 KiB
C
184 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* SMP initialisation and IPI support
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* Based on arch/arm64/kernel/smp.c
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*
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* Copyright (C) 2012 ARM Ltd.
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* Copyright (C) 2015 Regents of the University of California
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* Copyright (C) 2017 SiFive
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*/
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#include <linux/arch_topology.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/kernel_stat.h>
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#include <linux/notifier.h>
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#include <linux/cpu.h>
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#include <linux/percpu.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/irq.h>
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#include <linux/of.h>
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#include <linux/sched/task_stack.h>
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#include <linux/sched/mm.h>
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#include <asm/cpu_ops.h>
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#include <asm/irq.h>
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#include <asm/mmu_context.h>
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#include <asm/numa.h>
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#include <asm/tlbflush.h>
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#include <asm/sections.h>
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#include <asm/sbi.h>
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#include <asm/smp.h>
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#include <asm/alternative.h>
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#include "head.h"
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static DECLARE_COMPLETION(cpu_running);
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void __init smp_prepare_boot_cpu(void)
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{
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init_cpu_topology();
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apply_boot_alternatives();
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}
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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int cpuid;
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int ret;
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unsigned int curr_cpuid;
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curr_cpuid = smp_processor_id();
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numa_store_cpu_info(curr_cpuid);
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numa_add_cpu(curr_cpuid);
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/* This covers non-smp usecase mandated by "nosmp" option */
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if (max_cpus == 0)
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return;
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for_each_possible_cpu(cpuid) {
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if (cpuid == curr_cpuid)
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continue;
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if (cpu_ops[cpuid]->cpu_prepare) {
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ret = cpu_ops[cpuid]->cpu_prepare(cpuid);
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if (ret)
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continue;
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}
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set_cpu_present(cpuid, true);
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numa_store_cpu_info(cpuid);
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}
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}
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void __init setup_smp(void)
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{
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struct device_node *dn;
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int hart;
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bool found_boot_cpu = false;
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int cpuid = 1;
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cpu_set_ops(0);
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for_each_of_cpu_node(dn) {
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hart = riscv_of_processor_hartid(dn);
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if (hart < 0)
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continue;
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if (hart == cpuid_to_hartid_map(0)) {
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BUG_ON(found_boot_cpu);
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found_boot_cpu = 1;
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early_map_cpu_to_node(0, of_node_to_nid(dn));
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continue;
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}
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if (cpuid >= NR_CPUS) {
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pr_warn("Invalid cpuid [%d] for hartid [%d]\n",
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cpuid, hart);
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continue;
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}
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cpuid_to_hartid_map(cpuid) = hart;
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early_map_cpu_to_node(cpuid, of_node_to_nid(dn));
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cpuid++;
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}
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BUG_ON(!found_boot_cpu);
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if (cpuid > nr_cpu_ids)
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pr_warn("Total number of cpus [%d] is greater than nr_cpus option value [%d]\n",
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cpuid, nr_cpu_ids);
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for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) {
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if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) {
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cpu_set_ops(cpuid);
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set_cpu_possible(cpuid, true);
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}
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}
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}
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static int start_secondary_cpu(int cpu, struct task_struct *tidle)
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{
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if (cpu_ops[cpu]->cpu_start)
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return cpu_ops[cpu]->cpu_start(cpu, tidle);
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return -EOPNOTSUPP;
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}
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int __cpu_up(unsigned int cpu, struct task_struct *tidle)
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{
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int ret = 0;
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tidle->thread_info.cpu = cpu;
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ret = start_secondary_cpu(cpu, tidle);
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if (!ret) {
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wait_for_completion_timeout(&cpu_running,
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msecs_to_jiffies(1000));
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if (!cpu_online(cpu)) {
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pr_crit("CPU%u: failed to come online\n", cpu);
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ret = -EIO;
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}
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} else {
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pr_crit("CPU%u: failed to start\n", cpu);
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}
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return ret;
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}
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void __init smp_cpus_done(unsigned int max_cpus)
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{
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}
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/*
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* C entry point for a secondary processor.
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*/
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asmlinkage __visible void smp_callin(void)
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{
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struct mm_struct *mm = &init_mm;
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unsigned int curr_cpuid = smp_processor_id();
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riscv_clear_ipi();
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/* All kernel threads share the same mm context. */
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mmgrab(mm);
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current->active_mm = mm;
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notify_cpu_starting(curr_cpuid);
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numa_add_cpu(curr_cpuid);
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update_siblings_masks(curr_cpuid);
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set_cpu_online(curr_cpuid, 1);
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/*
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* Remote TLB flushes are ignored while the CPU is offline, so emit
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* a local TLB flush right now just in case.
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*/
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local_flush_tlb_all();
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complete(&cpu_running);
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/*
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* Disable preemption before enabling interrupts, so we don't try to
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* schedule a CPU that hasn't actually started yet.
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*/
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local_irq_enable();
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cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
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}
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