e6f80e87e0
Add a dedicated interrupt chip definition for the EtherNAT CPLD interrupts. SMC91C111 and ISP1160 chips have separate interrupts that can be enabled and disabled in a CPLD register at offset 0x23 from the card base. Note the CPLD interrupt control register is mapped on demand, whenever any interrupt enable/disable action is requested. The EtherNAT USB driver still needs interrupts disabled around reset and start actions. In particular, we cannot entirely rely on the irq_startup being called first. The smc91x and isp116x-hcd drivers will use this feature. Signed-off-by: Michael Schmitz <schmitz@debian.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>