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Vincent Chen 2f01b78641 riscv: remove the switch statement in do_trap_break() 
To make the code more straightforward, replace the switch statement
with an if statement.

Suggested-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
[paul.walmsley@sifive.com: cleaned up patch description; updated to
 apply]
Link: https://lore.kernel.org/linux-riscv/20190927224711.GI4700@infradead.org/
Link: https://lore.kernel.org/linux-riscv/CABvJ_xiHJSB7P5QekuLRP=LBPzXXghAfuUpPUYb=a_HbnOQ6BA@mail.gmail.com/
Link: https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org/thread/VDCU2WOB6KQISREO4V5DTXEI2M7VOV55/
Cc: Christoph Hellwig <hch@lst.de>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-10-14 12:30:28 -07:00
..
vdso
riscv: Fix perf record without libelf support
2019-07-31 12:26:10 -07:00
.gitignore
RISC-V: Build Infrastructure
2017-09-26 15:26:49 -07:00
asm-offsets.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
cacheinfo.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
cpu.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
cpufeature.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234
2019-06-19 17:09:07 +02:00
entry.S
RISC-V: entry: Remove unneeded need_resched() loop
2019-10-09 16:48:27 -07:00
fpu.S
riscv: Using CSR numbers to access CSRs
2019-08-30 11:04:19 -07:00
ftrace.c
riscv: add missing newlines to printk messages
2019-02-11 15:34:56 -08:00
head.S
arch/riscv: disable excess harts before picking main boot hart
2019-09-20 08:36:36 -07:00
irq.c
RISC-V: Add interrupt related SCAUSE defines in asm/csr.h
2019-05-16 20:42:11 -07:00
Makefile
riscv: Add support for perf registers sampling
2019-09-05 00:48:58 -07:00
mcount-dyn.S
riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support
2018-04-02 19:59:13 -07:00
mcount.S
RISC-V: remove the unused return_to_handler export
2018-10-22 17:38:12 -07:00
module-sections.c
RISC-V: Support MODULE_SECTIONS mechanism on RV32
2019-01-07 08:19:20 -08:00
module.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
2019-05-30 11:26:37 -07:00
module.lds
RISC-V: Add section of GOT.PLT for kernel module
2018-04-02 20:00:54 -07:00
perf_callchain.c
riscv: Add perf callchain support
2019-09-04 12:43:00 -07:00
perf_event.c
RISC-V: Access CSRs using CSR numbers
2019-05-16 20:42:11 -07:00
perf_regs.c
riscv: Add support for perf registers sampling
2019-09-05 00:48:58 -07:00
process.c
riscv: Correct the initialized flow of FP register
2019-08-14 13:11:11 -07:00
ptrace.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
reset.c
RISC-V patches for v5.2-rc6
2019-06-17 10:34:03 -07:00
riscv_ksyms.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
2019-06-19 17:09:55 +02:00
setup.c
RISC-V: Setup initial page tables in two stages
2019-07-09 09:08:04 -07:00
signal.c
Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace
2019-07-08 21:48:15 -07:00
smp.c
RISC-V: Export kernel symbols for kvm
2019-09-20 08:36:39 -07:00
smpboot.c
RISC-V: Parse cpu topology during boot.
2019-07-22 09:36:30 -07:00
stacktrace.c
riscv: Add perf callchain support
2019-09-04 12:43:00 -07:00
sys_riscv.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
syscall_table.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
time.c
RISC-V: Export kernel symbols for kvm
2019-09-20 08:36:39 -07:00
traps.c
riscv: remove the switch statement in do_trap_break()
2019-10-14 12:30:28 -07:00
vdso.c
riscv: Remove gate area stubs
2019-07-01 13:13:36 -07:00
vmlinux.lds.S
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00