4562236b3b
Supported DCE versions: 8.0, 10.0, 11.0, 11.2 v2: rebase against 4.11 Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
94 lines
2.5 KiB
C
94 lines
2.5 KiB
C
/*
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* Copyright 2012-15 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef __DAL_COMPRESSOR_H__
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#define __DAL_COMPRESSOR_H__
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#include "include/grph_object_id.h"
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#include "bios_parser_interface.h"
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enum fbc_compress_ratio {
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FBC_COMPRESS_RATIO_INVALID = 0,
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FBC_COMPRESS_RATIO_1TO1 = 1,
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FBC_COMPRESS_RATIO_2TO1 = 2,
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FBC_COMPRESS_RATIO_4TO1 = 4,
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FBC_COMPRESS_RATIO_8TO1 = 8,
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};
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union fbc_physical_address {
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struct {
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uint32_t low_part;
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int32_t high_part;
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} addr;
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};
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struct compr_addr_and_pitch_params {
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uint32_t inst;
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uint32_t source_view_width;
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uint32_t source_view_height;
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};
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enum fbc_hw_max_resolution_supported {
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FBC_MAX_X = 3840,
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FBC_MAX_Y = 2400
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};
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struct compressor {
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struct dc_context *ctx;
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uint32_t attached_inst;
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bool is_enabled;
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union {
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uint32_t raw;
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struct {
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uint32_t FBC_SUPPORT:1;
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uint32_t FB_POOL:1;
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uint32_t DYNAMIC_ALLOC:1;
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uint32_t LPT_SUPPORT:1;
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uint32_t LPT_MC_CONFIG:1;
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uint32_t DUMMY_BACKEND:1;
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uint32_t CLK_GATING_DISABLED:1;
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} bits;
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} options;
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union fbc_physical_address compr_surface_address;
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uint32_t embedded_panel_h_size;
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uint32_t embedded_panel_v_size;
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uint32_t memory_bus_width;
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uint32_t banks_num;
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uint32_t raw_size;
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uint32_t channel_interleave_size;
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uint32_t dram_channels_num;
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uint32_t allocated_size;
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uint32_t preferred_requested_size;
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uint32_t lpt_channels_num;
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enum fbc_compress_ratio min_compress_ratio;
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};
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#endif
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