In order to make the schema more readable, split dpu-sc7180 into the DPU and MDSS parts, each one describing just a single device binding. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/508386/ Link: https://lore.kernel.org/r/20221024164225.3236654-7-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
96 lines
2.3 KiB
YAML
96 lines
2.3 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Qualcomm Display DPU dt properties for SC7180 target
|
|
|
|
maintainers:
|
|
- Krishna Manikandan <quic_mkrishn@quicinc.com>
|
|
|
|
$ref: /schemas/display/msm/dpu-common.yaml#
|
|
|
|
properties:
|
|
compatible:
|
|
items:
|
|
- const: qcom,sc7180-dpu
|
|
|
|
reg:
|
|
items:
|
|
- description: Address offset and size for mdp register set
|
|
- description: Address offset and size for vbif register set
|
|
|
|
reg-names:
|
|
items:
|
|
- const: mdp
|
|
- const: vbif
|
|
|
|
clocks:
|
|
items:
|
|
- description: Display hf axi clock
|
|
- description: Display ahb clock
|
|
- description: Display rotator clock
|
|
- description: Display lut clock
|
|
- description: Display core clock
|
|
- description: Display vsync clock
|
|
|
|
clock-names:
|
|
items:
|
|
- const: bus
|
|
- const: iface
|
|
- const: rot
|
|
- const: lut
|
|
- const: core
|
|
- const: vsync
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/clock/qcom,dispcc-sc7180.h>
|
|
#include <dt-bindings/clock/qcom,gcc-sc7180.h>
|
|
#include <dt-bindings/power/qcom-rpmpd.h>
|
|
|
|
display-controller@ae01000 {
|
|
compatible = "qcom,sc7180-dpu";
|
|
reg = <0x0ae01000 0x8f000>,
|
|
<0x0aeb0000 0x2008>;
|
|
|
|
reg-names = "mdp", "vbif";
|
|
|
|
clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
|
|
<&dispcc DISP_CC_MDSS_AHB_CLK>,
|
|
<&dispcc DISP_CC_MDSS_ROT_CLK>,
|
|
<&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
|
|
<&dispcc DISP_CC_MDSS_MDP_CLK>,
|
|
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
|
|
clock-names = "bus", "iface", "rot", "lut", "core",
|
|
"vsync";
|
|
|
|
interrupt-parent = <&mdss>;
|
|
interrupts = <0>;
|
|
power-domains = <&rpmhpd SC7180_CX>;
|
|
operating-points-v2 = <&mdp_opp_table>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
endpoint {
|
|
remote-endpoint = <&dsi0_in>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
endpoint {
|
|
remote-endpoint = <&dp_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
...
|