Haojian Zhuang ea010e5188 clk: hi3620: add gate clock flag
Add missing CLK_SET_RATE_PARENT flag for gate clock.

Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2013-12-11 16:42:23 +08:00
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2013-10-07 22:43:27 -07:00
2013-03-19 17:20:30 -07:00
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