ea1847c09c
The Quartz64 Model A has the SPI pins broken out on its pin header. The actual pins being used though are not the m0 variant, but the m1 variant, which also lacks the cs1 pin. This commit overrides pinctrl-0 accordingly for this board. spi1 is intentionally left disabled, as anyone wishing to add SPI devices needs to edit the dts anyway, and the pins are more useful as GPIOs for the rest of the users. Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Link: https://lore.kernel.org/r/20211127141910.12649-4-frattaroli.nicolas@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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.. | ||
boot | ||
configs | ||
crypto | ||
hyperv | ||
include | ||
kernel | ||
kvm | ||
lib | ||
mm | ||
net | ||
tools | ||
xen | ||
Kbuild | ||
Kconfig | ||
Kconfig.debug | ||
Kconfig.platforms | ||
Makefile |