2874c5fd28
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
177 lines
3.5 KiB
Plaintext
177 lines
3.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* SBC8641D Device Tree Source
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*
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* Copyright 2008 Wind River Systems Inc.
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*
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* Paul Gortmaker (see MAINTAINERS for contact information)
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*
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* Based largely on the mpc8641_hpcn.dts by Freescale Semiconductor Inc.
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*/
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/include/ "mpc8641si-pre.dtsi"
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/ {
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model = "SBC8641D";
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compatible = "wind,sbc8641";
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>; // 512M at 0x0
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};
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lbc: localbus@f8005000 {
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reg = <0xf8005000 0x1000>;
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ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
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1 0 0xf0000000 0x00010000 // 64KB EEPROM
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2 0 0xf1000000 0x00100000 // EPLD (1MB)
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3 0 0xe0000000 0x04000000 // 64MB LB SDRAM (CS3)
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4 0 0xe4000000 0x04000000 // 64MB LB SDRAM (CS4)
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6 0 0xf4000000 0x00100000 // LCD display (1MB)
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7 0 0xe8000000 0x04000000>; // 64MB OneNAND
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flash@0,0 {
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compatible = "cfi-flash";
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reg = <0 0 0x01000000>;
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bank-width = <2>;
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device-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "dtb";
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reg = <0x00000000 0x00100000>;
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read-only;
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};
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partition@300000 {
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label = "kernel";
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reg = <0x00100000 0x00400000>;
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read-only;
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};
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partition@400000 {
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label = "fs";
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reg = <0x00500000 0x00a00000>;
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};
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partition@700000 {
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label = "firmware";
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reg = <0x00f00000 0x00100000>;
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read-only;
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};
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};
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epld@2,0 {
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compatible = "wrs,epld-localbus";
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#address-cells = <2>;
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#size-cells = <1>;
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reg = <2 0 0x100000>;
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ranges = <0 0 5 0 1 // User switches
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1 0 5 1 1 // Board ID/Rev
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3 0 5 3 1>; // LEDs
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};
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};
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soc: soc@f8000000 {
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ranges = <0x00000000 0xf8000000 0x00100000>;
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enet0: ethernet@24000 {
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tbi-handle = <&tbi0>;
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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};
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mdio@24520 {
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phy0: ethernet-phy@1f {
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reg = <0x1f>;
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};
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phy1: ethernet-phy@0 {
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reg = <0>;
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};
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phy2: ethernet-phy@1 {
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reg = <1>;
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};
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phy3: ethernet-phy@2 {
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reg = <2>;
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};
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tbi0: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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enet1: ethernet@25000 {
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tbi-handle = <&tbi1>;
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phy-handle = <&phy1>;
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phy-connection-type = "rgmii-id";
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};
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mdio@25520 {
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tbi1: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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enet2: ethernet@26000 {
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tbi-handle = <&tbi2>;
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phy-handle = <&phy2>;
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phy-connection-type = "rgmii-id";
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};
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mdio@26520 {
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tbi2: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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enet3: ethernet@27000 {
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tbi-handle = <&tbi3>;
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phy-handle = <&phy3>;
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phy-connection-type = "rgmii-id";
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};
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mdio@27520 {
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tbi3: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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};
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pci0: pcie@f8008000 {
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reg = <0xf8008000 0x1000>;
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ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
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0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
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interrupt-map-mask = <0xff00 0 0 7>;
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pcie@0 {
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ranges = <0x02000000 0x0 0x80000000
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0x02000000 0x0 0x80000000
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0x0 0x20000000
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0x01000000 0x0 0x00000000
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0x01000000 0x0 0x00000000
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0x0 0x00100000>;
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};
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};
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pci1: pcie@f8009000 {
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reg = <0xf8009000 0x1000>;
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ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
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0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
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pcie@0 {
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ranges = <0x02000000 0x0 0xa0000000
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0x02000000 0x0 0xa0000000
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0x0 0x20000000
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0x01000000 0x0 0x00000000
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0x01000000 0x0 0x00000000
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0x0 0x00100000>;
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};
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};
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};
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/include/ "mpc8641si-post.dtsi"
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