linux

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Linus Torvalds 5a61b7a296 RISC-V Fixes for 5.14-rc8 (or 5.14)

* A pair of device tree updates for the Microsemi Polarfire development
   kit that fix some mismatches between the u-boot and Linux enternet
   entries.
 * A fix to ensure that the F register state is correctly reflected in
   core dumps.
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Merge tag 'riscv-for-linus-5.14-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Palmer Dabbelt:

 - device tree updates for the Microsemi Polarfire development kit that
   fix some mismatches between the u-boot and Linux enternet entries

 - ensure that the F register state is correctly reflected in core dumps

* tag 'riscv-for-linus-5.14-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: dts: microchip: Add ethernet0 to the aliases node
  riscv: dts: microchip: Use 'local-mac-address' for emac1
  riscv: Ensure the value of FP registers in the core dump file is up to date

2021-08-27 11:04:57 -07:00

boot

riscv: dts: microchip: Add ethernet0 to the aliases node

2021-08-24 20:57:32 -07:00

configs

RISC-V: Enable Microchip PolarFire ICICLE SoC

2021-04-26 08:31:32 -07:00

errata

riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled

2021-06-01 21:16:41 -07:00

include

riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion