80624263fa
With LOCKDEP enabled, CTI driver triggers the following splat due
to uninitialized lock class for dynamically allocated attribute
objects.
[ 5.372901] coresight etm0: CPU0: ETM v4.0 initialized
[ 5.376694] coresight etm1: CPU1: ETM v4.0 initialized
[ 5.380785] coresight etm2: CPU2: ETM v4.0 initialized
[ 5.385851] coresight etm3: CPU3: ETM v4.0 initialized
[ 5.389808] BUG: key ffff00000564a798 has not been registered!
[ 5.392456] ------------[ cut here ]------------
[ 5.398195] DEBUG_LOCKS_WARN_ON(1)
[ 5.398233] WARNING: CPU: 1 PID: 32 at kernel/locking/lockdep.c:4623 lockdep_init_map_waits+0x14c/0x260
[ 5.406149] Modules linked in:
[ 5.415411] CPU: 1 PID: 32 Comm: kworker/1:1 Not tainted 5.9.0-12034-gbbe85027ce80 #51
[ 5.418553] Hardware name: Qualcomm Technologies, Inc. APQ 8016 SBC (DT)
[ 5.426453] Workqueue: events amba_deferred_retry_func
[ 5.433299] pstate: 40000005 (nZcv daif -PAN -UAO -TCO BTYPE=--)
[ 5.438252] pc : lockdep_init_map_waits+0x14c/0x260
[ 5.444410] lr : lockdep_init_map_waits+0x14c/0x260
[ 5.449007] sp : ffff800012bbb720
...
[ 5.531561] Call trace:
[ 5.536847] lockdep_init_map_waits+0x14c/0x260
[ 5.539027] __kernfs_create_file+0xa8/0x1c8
[ 5.543539] sysfs_add_file_mode_ns+0xd0/0x208
[ 5.548054] internal_create_group+0x118/0x3c8
[ 5.552307] internal_create_groups+0x58/0xb8
[ 5.556733] sysfs_create_groups+0x2c/0x38
[ 5.561160] device_add+0x2d8/0x768
[ 5.565148] device_register+0x28/0x38
[ 5.568537] coresight_register+0xf8/0x320
[ 5.572358] cti_probe+0x1b0/0x3f0
...
Fix this by initializing the attributes when they are allocated.
Fixes: 3c5597e398
("coresight: cti: Add connection information to sysfs")
Reported-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20201029164559.1268531-2-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1220 lines
32 KiB
C
1220 lines
32 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 Linaro Limited, All rights reserved.
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* Author: Mike Leach <mike.leach@linaro.org>
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*/
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#include <linux/atomic.h>
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#include <linux/coresight.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <linux/sysfs.h>
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#include "coresight-cti.h"
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/*
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* Declare the number of static declared attribute groups
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* Value includes groups + NULL value at end of table.
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*/
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#define CORESIGHT_CTI_STATIC_GROUPS_MAX 5
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/*
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* List of trigger signal type names. Match the constants declared in
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* include\dt-bindings\arm\coresight-cti-dt.h
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*/
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static const char * const sig_type_names[] = {
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"genio", /* GEN_IO */
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"intreq", /* GEN_INTREQ */
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"intack", /* GEN_INTACK */
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"haltreq", /* GEN_HALTREQ */
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"restartreq", /* GEN_RESTARTREQ */
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"pe_edbgreq", /* PE_EDBGREQ */
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"pe_dbgrestart",/* PE_DBGRESTART */
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"pe_ctiirq", /* PE_CTIIRQ */
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"pe_pmuirq", /* PE_PMUIRQ */
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"pe_dbgtrigger",/* PE_DBGTRIGGER */
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"etm_extout", /* ETM_EXTOUT */
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"etm_extin", /* ETM_EXTIN */
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"snk_full", /* SNK_FULL */
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"snk_acqcomp", /* SNK_ACQCOMP */
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"snk_flushcomp",/* SNK_FLUSHCOMP */
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"snk_flushin", /* SNK_FLUSHIN */
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"snk_trigin", /* SNK_TRIGIN */
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"stm_asyncout", /* STM_ASYNCOUT */
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"stm_tout_spte",/* STM_TOUT_SPTE */
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"stm_tout_sw", /* STM_TOUT_SW */
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"stm_tout_hete",/* STM_TOUT_HETE */
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"stm_hwevent", /* STM_HWEVENT */
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"ela_tstart", /* ELA_TSTART */
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"ela_tstop", /* ELA_TSTOP */
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"ela_dbgreq", /* ELA_DBGREQ */
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};
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/* Show function pointer used in the connections dynamic declared attributes*/
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typedef ssize_t (*p_show_fn)(struct device *dev, struct device_attribute *attr,
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char *buf);
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/* Connection attribute types */
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enum cti_conn_attr_type {
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CTI_CON_ATTR_NAME,
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CTI_CON_ATTR_TRIGIN_SIG,
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CTI_CON_ATTR_TRIGOUT_SIG,
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CTI_CON_ATTR_TRIGIN_TYPES,
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CTI_CON_ATTR_TRIGOUT_TYPES,
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CTI_CON_ATTR_MAX,
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};
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/* Names for the connection attributes */
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static const char * const con_attr_names[CTI_CON_ATTR_MAX] = {
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"name",
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"in_signals",
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"out_signals",
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"in_types",
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"out_types",
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};
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/* basic attributes */
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static ssize_t enable_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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int enable_req;
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bool enabled, powered;
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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enable_req = atomic_read(&drvdata->config.enable_req_count);
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spin_lock(&drvdata->spinlock);
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powered = drvdata->config.hw_powered;
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enabled = drvdata->config.hw_enabled;
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spin_unlock(&drvdata->spinlock);
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if (powered)
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return sprintf(buf, "%d\n", enabled);
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else
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return sprintf(buf, "%d\n", !!enable_req);
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}
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static ssize_t enable_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t size)
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{
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int ret = 0;
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unsigned long val;
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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ret = kstrtoul(buf, 0, &val);
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if (ret)
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return ret;
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if (val)
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ret = cti_enable(drvdata->csdev);
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else
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ret = cti_disable(drvdata->csdev);
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if (ret)
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return ret;
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return size;
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}
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static DEVICE_ATTR_RW(enable);
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static ssize_t powered_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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bool powered;
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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spin_lock(&drvdata->spinlock);
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powered = drvdata->config.hw_powered;
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spin_unlock(&drvdata->spinlock);
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return sprintf(buf, "%d\n", powered);
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}
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static DEVICE_ATTR_RO(powered);
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static ssize_t ctmid_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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return sprintf(buf, "%d\n", drvdata->ctidev.ctm_id);
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}
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static DEVICE_ATTR_RO(ctmid);
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static ssize_t nr_trigger_cons_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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return sprintf(buf, "%d\n", drvdata->ctidev.nr_trig_con);
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}
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static DEVICE_ATTR_RO(nr_trigger_cons);
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/* attribute and group sysfs tables. */
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static struct attribute *coresight_cti_attrs[] = {
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&dev_attr_enable.attr,
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&dev_attr_powered.attr,
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&dev_attr_ctmid.attr,
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&dev_attr_nr_trigger_cons.attr,
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NULL,
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};
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/* register based attributes */
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/* macro to access RO registers with power check only (no enable check). */
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#define coresight_cti_reg(name, offset) \
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static ssize_t name##_show(struct device *dev, \
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struct device_attribute *attr, char *buf) \
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{ \
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \
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u32 val = 0; \
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pm_runtime_get_sync(dev->parent); \
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spin_lock(&drvdata->spinlock); \
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if (drvdata->config.hw_powered) \
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val = readl_relaxed(drvdata->base + offset); \
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spin_unlock(&drvdata->spinlock); \
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pm_runtime_put_sync(dev->parent); \
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return sprintf(buf, "0x%x\n", val); \
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} \
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static DEVICE_ATTR_RO(name)
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/* coresight management registers */
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coresight_cti_reg(devaff0, CTIDEVAFF0);
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coresight_cti_reg(devaff1, CTIDEVAFF1);
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coresight_cti_reg(authstatus, CORESIGHT_AUTHSTATUS);
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coresight_cti_reg(devarch, CORESIGHT_DEVARCH);
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coresight_cti_reg(devid, CORESIGHT_DEVID);
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coresight_cti_reg(devtype, CORESIGHT_DEVTYPE);
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coresight_cti_reg(pidr0, CORESIGHT_PERIPHIDR0);
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coresight_cti_reg(pidr1, CORESIGHT_PERIPHIDR1);
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coresight_cti_reg(pidr2, CORESIGHT_PERIPHIDR2);
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coresight_cti_reg(pidr3, CORESIGHT_PERIPHIDR3);
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coresight_cti_reg(pidr4, CORESIGHT_PERIPHIDR4);
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static struct attribute *coresight_cti_mgmt_attrs[] = {
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&dev_attr_devaff0.attr,
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&dev_attr_devaff1.attr,
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&dev_attr_authstatus.attr,
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&dev_attr_devarch.attr,
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&dev_attr_devid.attr,
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&dev_attr_devtype.attr,
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&dev_attr_pidr0.attr,
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&dev_attr_pidr1.attr,
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&dev_attr_pidr2.attr,
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&dev_attr_pidr3.attr,
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&dev_attr_pidr4.attr,
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NULL,
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};
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/* CTI low level programming registers */
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/*
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* Show a simple 32 bit value if enabled and powered.
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* If inaccessible & pcached_val not NULL then show cached value.
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*/
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static ssize_t cti_reg32_show(struct device *dev, char *buf,
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u32 *pcached_val, int reg_offset)
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{
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u32 val = 0;
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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struct cti_config *config = &drvdata->config;
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spin_lock(&drvdata->spinlock);
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if ((reg_offset >= 0) && cti_active(config)) {
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CS_UNLOCK(drvdata->base);
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val = readl_relaxed(drvdata->base + reg_offset);
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if (pcached_val)
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*pcached_val = val;
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CS_LOCK(drvdata->base);
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} else if (pcached_val) {
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val = *pcached_val;
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}
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spin_unlock(&drvdata->spinlock);
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return sprintf(buf, "%#x\n", val);
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}
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/*
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* Store a simple 32 bit value.
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* If pcached_val not NULL, then copy to here too,
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* if reg_offset >= 0 then write through if enabled.
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*/
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static ssize_t cti_reg32_store(struct device *dev, const char *buf,
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size_t size, u32 *pcached_val, int reg_offset)
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{
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unsigned long val;
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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struct cti_config *config = &drvdata->config;
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if (kstrtoul(buf, 0, &val))
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return -EINVAL;
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spin_lock(&drvdata->spinlock);
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/* local store */
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if (pcached_val)
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*pcached_val = (u32)val;
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/* write through if offset and enabled */
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if ((reg_offset >= 0) && cti_active(config))
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cti_write_single_reg(drvdata, reg_offset, val);
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spin_unlock(&drvdata->spinlock);
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return size;
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}
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/* Standard macro for simple rw cti config registers */
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#define cti_config_reg32_rw(name, cfgname, offset) \
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static ssize_t name##_show(struct device *dev, \
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struct device_attribute *attr, \
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char *buf) \
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{ \
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \
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return cti_reg32_show(dev, buf, \
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&drvdata->config.cfgname, offset); \
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} \
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\
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static ssize_t name##_store(struct device *dev, \
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struct device_attribute *attr, \
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const char *buf, size_t size) \
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{ \
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \
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return cti_reg32_store(dev, buf, size, \
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&drvdata->config.cfgname, offset); \
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} \
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static DEVICE_ATTR_RW(name)
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static ssize_t inout_sel_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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u32 val;
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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val = (u32)drvdata->config.ctiinout_sel;
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return sprintf(buf, "%d\n", val);
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}
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static ssize_t inout_sel_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t size)
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{
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unsigned long val;
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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if (kstrtoul(buf, 0, &val))
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return -EINVAL;
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if (val > (CTIINOUTEN_MAX - 1))
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return -EINVAL;
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spin_lock(&drvdata->spinlock);
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drvdata->config.ctiinout_sel = val;
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spin_unlock(&drvdata->spinlock);
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return size;
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}
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static DEVICE_ATTR_RW(inout_sel);
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static ssize_t inen_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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unsigned long val;
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int index;
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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spin_lock(&drvdata->spinlock);
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index = drvdata->config.ctiinout_sel;
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val = drvdata->config.ctiinen[index];
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spin_unlock(&drvdata->spinlock);
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return sprintf(buf, "%#lx\n", val);
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}
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static ssize_t inen_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t size)
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{
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unsigned long val;
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int index;
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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struct cti_config *config = &drvdata->config;
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if (kstrtoul(buf, 0, &val))
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return -EINVAL;
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spin_lock(&drvdata->spinlock);
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index = config->ctiinout_sel;
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config->ctiinen[index] = val;
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/* write through if enabled */
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if (cti_active(config))
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cti_write_single_reg(drvdata, CTIINEN(index), val);
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spin_unlock(&drvdata->spinlock);
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return size;
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}
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static DEVICE_ATTR_RW(inen);
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static ssize_t outen_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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unsigned long val;
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int index;
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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spin_lock(&drvdata->spinlock);
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index = drvdata->config.ctiinout_sel;
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val = drvdata->config.ctiouten[index];
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spin_unlock(&drvdata->spinlock);
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return sprintf(buf, "%#lx\n", val);
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}
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static ssize_t outen_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t size)
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{
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unsigned long val;
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int index;
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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struct cti_config *config = &drvdata->config;
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if (kstrtoul(buf, 0, &val))
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return -EINVAL;
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spin_lock(&drvdata->spinlock);
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index = config->ctiinout_sel;
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config->ctiouten[index] = val;
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/* write through if enabled */
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if (cti_active(config))
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cti_write_single_reg(drvdata, CTIOUTEN(index), val);
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spin_unlock(&drvdata->spinlock);
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return size;
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}
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static DEVICE_ATTR_RW(outen);
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static ssize_t intack_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t size)
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{
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unsigned long val;
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if (kstrtoul(buf, 0, &val))
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return -EINVAL;
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|
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cti_write_intack(dev, val);
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return size;
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}
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static DEVICE_ATTR_WO(intack);
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|
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cti_config_reg32_rw(gate, ctigate, CTIGATE);
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cti_config_reg32_rw(asicctl, asicctl, ASICCTL);
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cti_config_reg32_rw(appset, ctiappset, CTIAPPSET);
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|
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static ssize_t appclear_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t size)
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{
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unsigned long val;
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struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
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struct cti_config *config = &drvdata->config;
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|
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if (kstrtoul(buf, 0, &val))
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return -EINVAL;
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spin_lock(&drvdata->spinlock);
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|
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/* a 1'b1 in appclr clears down the same bit in appset*/
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config->ctiappset &= ~val;
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|
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/* write through if enabled */
|
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if (cti_active(config))
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cti_write_single_reg(drvdata, CTIAPPCLEAR, val);
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spin_unlock(&drvdata->spinlock);
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return size;
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}
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static DEVICE_ATTR_WO(appclear);
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|
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static ssize_t apppulse_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
unsigned long val;
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
struct cti_config *config = &drvdata->config;
|
|
|
|
if (kstrtoul(buf, 0, &val))
|
|
return -EINVAL;
|
|
|
|
spin_lock(&drvdata->spinlock);
|
|
|
|
/* write through if enabled */
|
|
if (cti_active(config))
|
|
cti_write_single_reg(drvdata, CTIAPPPULSE, val);
|
|
spin_unlock(&drvdata->spinlock);
|
|
return size;
|
|
}
|
|
static DEVICE_ATTR_WO(apppulse);
|
|
|
|
coresight_cti_reg(triginstatus, CTITRIGINSTATUS);
|
|
coresight_cti_reg(trigoutstatus, CTITRIGOUTSTATUS);
|
|
coresight_cti_reg(chinstatus, CTICHINSTATUS);
|
|
coresight_cti_reg(choutstatus, CTICHOUTSTATUS);
|
|
|
|
/*
|
|
* Define CONFIG_CORESIGHT_CTI_INTEGRATION_REGS to enable the access to the
|
|
* integration control registers. Normally only used to investigate connection
|
|
* data.
|
|
*/
|
|
#ifdef CONFIG_CORESIGHT_CTI_INTEGRATION_REGS
|
|
|
|
/* macro to access RW registers with power check only (no enable check). */
|
|
#define coresight_cti_reg_rw(name, offset) \
|
|
static ssize_t name##_show(struct device *dev, \
|
|
struct device_attribute *attr, char *buf) \
|
|
{ \
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \
|
|
u32 val = 0; \
|
|
pm_runtime_get_sync(dev->parent); \
|
|
spin_lock(&drvdata->spinlock); \
|
|
if (drvdata->config.hw_powered) \
|
|
val = readl_relaxed(drvdata->base + offset); \
|
|
spin_unlock(&drvdata->spinlock); \
|
|
pm_runtime_put_sync(dev->parent); \
|
|
return sprintf(buf, "0x%x\n", val); \
|
|
} \
|
|
\
|
|
static ssize_t name##_store(struct device *dev, \
|
|
struct device_attribute *attr, \
|
|
const char *buf, size_t size) \
|
|
{ \
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \
|
|
unsigned long val = 0; \
|
|
if (kstrtoul(buf, 0, &val)) \
|
|
return -EINVAL; \
|
|
\
|
|
pm_runtime_get_sync(dev->parent); \
|
|
spin_lock(&drvdata->spinlock); \
|
|
if (drvdata->config.hw_powered) \
|
|
cti_write_single_reg(drvdata, offset, val); \
|
|
spin_unlock(&drvdata->spinlock); \
|
|
pm_runtime_put_sync(dev->parent); \
|
|
return size; \
|
|
} \
|
|
static DEVICE_ATTR_RW(name)
|
|
|
|
/* macro to access WO registers with power check only (no enable check). */
|
|
#define coresight_cti_reg_wo(name, offset) \
|
|
static ssize_t name##_store(struct device *dev, \
|
|
struct device_attribute *attr, \
|
|
const char *buf, size_t size) \
|
|
{ \
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \
|
|
unsigned long val = 0; \
|
|
if (kstrtoul(buf, 0, &val)) \
|
|
return -EINVAL; \
|
|
\
|
|
pm_runtime_get_sync(dev->parent); \
|
|
spin_lock(&drvdata->spinlock); \
|
|
if (drvdata->config.hw_powered) \
|
|
cti_write_single_reg(drvdata, offset, val); \
|
|
spin_unlock(&drvdata->spinlock); \
|
|
pm_runtime_put_sync(dev->parent); \
|
|
return size; \
|
|
} \
|
|
static DEVICE_ATTR_WO(name)
|
|
|
|
coresight_cti_reg_rw(itchout, ITCHOUT);
|
|
coresight_cti_reg_rw(ittrigout, ITTRIGOUT);
|
|
coresight_cti_reg_rw(itctrl, CORESIGHT_ITCTRL);
|
|
coresight_cti_reg_wo(itchinack, ITCHINACK);
|
|
coresight_cti_reg_wo(ittriginack, ITTRIGINACK);
|
|
coresight_cti_reg(ittrigin, ITTRIGIN);
|
|
coresight_cti_reg(itchin, ITCHIN);
|
|
coresight_cti_reg(itchoutack, ITCHOUTACK);
|
|
coresight_cti_reg(ittrigoutack, ITTRIGOUTACK);
|
|
|
|
#endif /* CORESIGHT_CTI_INTEGRATION_REGS */
|
|
|
|
static struct attribute *coresight_cti_regs_attrs[] = {
|
|
&dev_attr_inout_sel.attr,
|
|
&dev_attr_inen.attr,
|
|
&dev_attr_outen.attr,
|
|
&dev_attr_gate.attr,
|
|
&dev_attr_asicctl.attr,
|
|
&dev_attr_intack.attr,
|
|
&dev_attr_appset.attr,
|
|
&dev_attr_appclear.attr,
|
|
&dev_attr_apppulse.attr,
|
|
&dev_attr_triginstatus.attr,
|
|
&dev_attr_trigoutstatus.attr,
|
|
&dev_attr_chinstatus.attr,
|
|
&dev_attr_choutstatus.attr,
|
|
#ifdef CONFIG_CORESIGHT_CTI_INTEGRATION_REGS
|
|
&dev_attr_itctrl.attr,
|
|
&dev_attr_ittrigin.attr,
|
|
&dev_attr_itchin.attr,
|
|
&dev_attr_ittrigout.attr,
|
|
&dev_attr_itchout.attr,
|
|
&dev_attr_itchoutack.attr,
|
|
&dev_attr_ittrigoutack.attr,
|
|
&dev_attr_ittriginack.attr,
|
|
&dev_attr_itchinack.attr,
|
|
#endif
|
|
NULL,
|
|
};
|
|
|
|
/* CTI channel x-trigger programming */
|
|
static int
|
|
cti_trig_op_parse(struct device *dev, enum cti_chan_op op,
|
|
enum cti_trig_dir dir, const char *buf, size_t size)
|
|
{
|
|
u32 chan_idx;
|
|
u32 trig_idx;
|
|
int items, err = -EINVAL;
|
|
|
|
/* extract chan idx and trigger idx */
|
|
items = sscanf(buf, "%d %d", &chan_idx, &trig_idx);
|
|
if (items == 2) {
|
|
err = cti_channel_trig_op(dev, op, dir, chan_idx, trig_idx);
|
|
if (!err)
|
|
err = size;
|
|
}
|
|
return err;
|
|
}
|
|
|
|
static ssize_t trigin_attach_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
return cti_trig_op_parse(dev, CTI_CHAN_ATTACH, CTI_TRIG_IN,
|
|
buf, size);
|
|
}
|
|
static DEVICE_ATTR_WO(trigin_attach);
|
|
|
|
static ssize_t trigin_detach_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
return cti_trig_op_parse(dev, CTI_CHAN_DETACH, CTI_TRIG_IN,
|
|
buf, size);
|
|
}
|
|
static DEVICE_ATTR_WO(trigin_detach);
|
|
|
|
static ssize_t trigout_attach_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
return cti_trig_op_parse(dev, CTI_CHAN_ATTACH, CTI_TRIG_OUT,
|
|
buf, size);
|
|
}
|
|
static DEVICE_ATTR_WO(trigout_attach);
|
|
|
|
static ssize_t trigout_detach_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
return cti_trig_op_parse(dev, CTI_CHAN_DETACH, CTI_TRIG_OUT,
|
|
buf, size);
|
|
}
|
|
static DEVICE_ATTR_WO(trigout_detach);
|
|
|
|
|
|
static ssize_t chan_gate_enable_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
int err = 0, channel = 0;
|
|
|
|
if (kstrtoint(buf, 0, &channel))
|
|
return -EINVAL;
|
|
|
|
err = cti_channel_gate_op(dev, CTI_GATE_CHAN_ENABLE, channel);
|
|
return err ? err : size;
|
|
}
|
|
|
|
static ssize_t chan_gate_enable_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
struct cti_config *cfg = &drvdata->config;
|
|
unsigned long ctigate_bitmask = cfg->ctigate;
|
|
int size = 0;
|
|
|
|
if (cfg->ctigate == 0)
|
|
size = sprintf(buf, "\n");
|
|
else
|
|
size = bitmap_print_to_pagebuf(true, buf, &ctigate_bitmask,
|
|
cfg->nr_ctm_channels);
|
|
return size;
|
|
}
|
|
static DEVICE_ATTR_RW(chan_gate_enable);
|
|
|
|
static ssize_t chan_gate_disable_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
int err = 0, channel = 0;
|
|
|
|
if (kstrtoint(buf, 0, &channel))
|
|
return -EINVAL;
|
|
|
|
err = cti_channel_gate_op(dev, CTI_GATE_CHAN_DISABLE, channel);
|
|
return err ? err : size;
|
|
}
|
|
static DEVICE_ATTR_WO(chan_gate_disable);
|
|
|
|
static int
|
|
chan_op_parse(struct device *dev, enum cti_chan_set_op op, const char *buf)
|
|
{
|
|
int err = 0, channel = 0;
|
|
|
|
if (kstrtoint(buf, 0, &channel))
|
|
return -EINVAL;
|
|
|
|
err = cti_channel_setop(dev, op, channel);
|
|
return err;
|
|
|
|
}
|
|
|
|
static ssize_t chan_set_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
int err = chan_op_parse(dev, CTI_CHAN_SET, buf);
|
|
|
|
return err ? err : size;
|
|
}
|
|
static DEVICE_ATTR_WO(chan_set);
|
|
|
|
static ssize_t chan_clear_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
int err = chan_op_parse(dev, CTI_CHAN_CLR, buf);
|
|
|
|
return err ? err : size;
|
|
}
|
|
static DEVICE_ATTR_WO(chan_clear);
|
|
|
|
static ssize_t chan_pulse_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
int err = chan_op_parse(dev, CTI_CHAN_PULSE, buf);
|
|
|
|
return err ? err : size;
|
|
}
|
|
static DEVICE_ATTR_WO(chan_pulse);
|
|
|
|
static ssize_t trig_filter_enable_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
u32 val;
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
spin_lock(&drvdata->spinlock);
|
|
val = drvdata->config.trig_filter_enable;
|
|
spin_unlock(&drvdata->spinlock);
|
|
return sprintf(buf, "%d\n", val);
|
|
}
|
|
|
|
static ssize_t trig_filter_enable_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
unsigned long val;
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
if (kstrtoul(buf, 0, &val))
|
|
return -EINVAL;
|
|
|
|
spin_lock(&drvdata->spinlock);
|
|
drvdata->config.trig_filter_enable = !!val;
|
|
spin_unlock(&drvdata->spinlock);
|
|
return size;
|
|
}
|
|
static DEVICE_ATTR_RW(trig_filter_enable);
|
|
|
|
static ssize_t trigout_filtered_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
struct cti_config *cfg = &drvdata->config;
|
|
int size = 0, nr_trig_max = cfg->nr_trig_max;
|
|
unsigned long mask = cfg->trig_out_filter;
|
|
|
|
if (mask)
|
|
size = bitmap_print_to_pagebuf(true, buf, &mask, nr_trig_max);
|
|
return size;
|
|
}
|
|
static DEVICE_ATTR_RO(trigout_filtered);
|
|
|
|
/* clear all xtrigger / channel programming */
|
|
static ssize_t chan_xtrigs_reset_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
int i;
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
struct cti_config *config = &drvdata->config;
|
|
|
|
spin_lock(&drvdata->spinlock);
|
|
|
|
/* clear the CTI trigger / channel programming registers */
|
|
for (i = 0; i < config->nr_trig_max; i++) {
|
|
config->ctiinen[i] = 0;
|
|
config->ctiouten[i] = 0;
|
|
}
|
|
|
|
/* clear the other regs */
|
|
config->ctigate = GENMASK(config->nr_ctm_channels - 1, 0);
|
|
config->asicctl = 0;
|
|
config->ctiappset = 0;
|
|
config->ctiinout_sel = 0;
|
|
config->xtrig_rchan_sel = 0;
|
|
|
|
/* if enabled then write through */
|
|
if (cti_active(config))
|
|
cti_write_all_hw_regs(drvdata);
|
|
|
|
spin_unlock(&drvdata->spinlock);
|
|
return size;
|
|
}
|
|
static DEVICE_ATTR_WO(chan_xtrigs_reset);
|
|
|
|
/*
|
|
* Write to select a channel to view, read to display the
|
|
* cross triggers for the selected channel.
|
|
*/
|
|
static ssize_t chan_xtrigs_sel_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
unsigned long val;
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
if (kstrtoul(buf, 0, &val))
|
|
return -EINVAL;
|
|
if (val > (drvdata->config.nr_ctm_channels - 1))
|
|
return -EINVAL;
|
|
|
|
spin_lock(&drvdata->spinlock);
|
|
drvdata->config.xtrig_rchan_sel = val;
|
|
spin_unlock(&drvdata->spinlock);
|
|
return size;
|
|
}
|
|
|
|
static ssize_t chan_xtrigs_sel_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
unsigned long val;
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
spin_lock(&drvdata->spinlock);
|
|
val = drvdata->config.xtrig_rchan_sel;
|
|
spin_unlock(&drvdata->spinlock);
|
|
|
|
return sprintf(buf, "%ld\n", val);
|
|
}
|
|
static DEVICE_ATTR_RW(chan_xtrigs_sel);
|
|
|
|
static ssize_t chan_xtrigs_in_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
struct cti_config *cfg = &drvdata->config;
|
|
int used = 0, reg_idx;
|
|
int nr_trig_max = drvdata->config.nr_trig_max;
|
|
u32 chan_mask = BIT(cfg->xtrig_rchan_sel);
|
|
|
|
for (reg_idx = 0; reg_idx < nr_trig_max; reg_idx++) {
|
|
if (chan_mask & cfg->ctiinen[reg_idx])
|
|
used += sprintf(buf + used, "%d ", reg_idx);
|
|
}
|
|
|
|
used += sprintf(buf + used, "\n");
|
|
return used;
|
|
}
|
|
static DEVICE_ATTR_RO(chan_xtrigs_in);
|
|
|
|
static ssize_t chan_xtrigs_out_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
struct cti_config *cfg = &drvdata->config;
|
|
int used = 0, reg_idx;
|
|
int nr_trig_max = drvdata->config.nr_trig_max;
|
|
u32 chan_mask = BIT(cfg->xtrig_rchan_sel);
|
|
|
|
for (reg_idx = 0; reg_idx < nr_trig_max; reg_idx++) {
|
|
if (chan_mask & cfg->ctiouten[reg_idx])
|
|
used += sprintf(buf + used, "%d ", reg_idx);
|
|
}
|
|
|
|
used += sprintf(buf + used, "\n");
|
|
return used;
|
|
}
|
|
static DEVICE_ATTR_RO(chan_xtrigs_out);
|
|
|
|
static ssize_t print_chan_list(struct device *dev,
|
|
char *buf, bool inuse)
|
|
{
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
struct cti_config *config = &drvdata->config;
|
|
int size, i;
|
|
unsigned long inuse_bits = 0, chan_mask;
|
|
|
|
/* scan regs to get bitmap of channels in use. */
|
|
spin_lock(&drvdata->spinlock);
|
|
for (i = 0; i < config->nr_trig_max; i++) {
|
|
inuse_bits |= config->ctiinen[i];
|
|
inuse_bits |= config->ctiouten[i];
|
|
}
|
|
spin_unlock(&drvdata->spinlock);
|
|
|
|
/* inverse bits if printing free channels */
|
|
if (!inuse)
|
|
inuse_bits = ~inuse_bits;
|
|
|
|
/* list of channels, or 'none' */
|
|
chan_mask = GENMASK(config->nr_ctm_channels - 1, 0);
|
|
if (inuse_bits & chan_mask)
|
|
size = bitmap_print_to_pagebuf(true, buf, &inuse_bits,
|
|
config->nr_ctm_channels);
|
|
else
|
|
size = sprintf(buf, "\n");
|
|
return size;
|
|
}
|
|
|
|
static ssize_t chan_inuse_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
return print_chan_list(dev, buf, true);
|
|
}
|
|
static DEVICE_ATTR_RO(chan_inuse);
|
|
|
|
static ssize_t chan_free_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
return print_chan_list(dev, buf, false);
|
|
}
|
|
static DEVICE_ATTR_RO(chan_free);
|
|
|
|
static struct attribute *coresight_cti_channel_attrs[] = {
|
|
&dev_attr_trigin_attach.attr,
|
|
&dev_attr_trigin_detach.attr,
|
|
&dev_attr_trigout_attach.attr,
|
|
&dev_attr_trigout_detach.attr,
|
|
&dev_attr_trig_filter_enable.attr,
|
|
&dev_attr_trigout_filtered.attr,
|
|
&dev_attr_chan_gate_enable.attr,
|
|
&dev_attr_chan_gate_disable.attr,
|
|
&dev_attr_chan_set.attr,
|
|
&dev_attr_chan_clear.attr,
|
|
&dev_attr_chan_pulse.attr,
|
|
&dev_attr_chan_inuse.attr,
|
|
&dev_attr_chan_free.attr,
|
|
&dev_attr_chan_xtrigs_sel.attr,
|
|
&dev_attr_chan_xtrigs_in.attr,
|
|
&dev_attr_chan_xtrigs_out.attr,
|
|
&dev_attr_chan_xtrigs_reset.attr,
|
|
NULL,
|
|
};
|
|
|
|
/* Create the connections trigger groups and attrs dynamically */
|
|
/*
|
|
* Each connection has dynamic group triggers<N> + name, trigin/out sigs/types
|
|
* attributes, + each device has static nr_trigger_cons giving the number
|
|
* of groups. e.g. in sysfs:-
|
|
* /cti_<name>/triggers0
|
|
* /cti_<name>/triggers1
|
|
* /cti_<name>/nr_trigger_cons
|
|
* where nr_trigger_cons = 2
|
|
*/
|
|
static ssize_t con_name_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct dev_ext_attribute *ext_attr =
|
|
container_of(attr, struct dev_ext_attribute, attr);
|
|
struct cti_trig_con *con = (struct cti_trig_con *)ext_attr->var;
|
|
|
|
return sprintf(buf, "%s\n", con->con_dev_name);
|
|
}
|
|
|
|
static ssize_t trigin_sig_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct dev_ext_attribute *ext_attr =
|
|
container_of(attr, struct dev_ext_attribute, attr);
|
|
struct cti_trig_con *con = (struct cti_trig_con *)ext_attr->var;
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
struct cti_config *cfg = &drvdata->config;
|
|
unsigned long mask = con->con_in->used_mask;
|
|
|
|
return bitmap_print_to_pagebuf(true, buf, &mask, cfg->nr_trig_max);
|
|
}
|
|
|
|
static ssize_t trigout_sig_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct dev_ext_attribute *ext_attr =
|
|
container_of(attr, struct dev_ext_attribute, attr);
|
|
struct cti_trig_con *con = (struct cti_trig_con *)ext_attr->var;
|
|
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
struct cti_config *cfg = &drvdata->config;
|
|
unsigned long mask = con->con_out->used_mask;
|
|
|
|
return bitmap_print_to_pagebuf(true, buf, &mask, cfg->nr_trig_max);
|
|
}
|
|
|
|
/* convert a sig type id to a name */
|
|
static const char *
|
|
cti_sig_type_name(struct cti_trig_con *con, int used_count, bool in)
|
|
{
|
|
int idx = 0;
|
|
struct cti_trig_grp *grp = in ? con->con_in : con->con_out;
|
|
|
|
if (used_count < grp->nr_sigs)
|
|
idx = grp->sig_types[used_count];
|
|
return sig_type_names[idx];
|
|
}
|
|
|
|
static ssize_t trigin_type_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct dev_ext_attribute *ext_attr =
|
|
container_of(attr, struct dev_ext_attribute, attr);
|
|
struct cti_trig_con *con = (struct cti_trig_con *)ext_attr->var;
|
|
int sig_idx, used = 0;
|
|
const char *name;
|
|
|
|
for (sig_idx = 0; sig_idx < con->con_in->nr_sigs; sig_idx++) {
|
|
name = cti_sig_type_name(con, sig_idx, true);
|
|
used += sprintf(buf + used, "%s ", name);
|
|
}
|
|
used += sprintf(buf + used, "\n");
|
|
return used;
|
|
}
|
|
|
|
static ssize_t trigout_type_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct dev_ext_attribute *ext_attr =
|
|
container_of(attr, struct dev_ext_attribute, attr);
|
|
struct cti_trig_con *con = (struct cti_trig_con *)ext_attr->var;
|
|
int sig_idx, used = 0;
|
|
const char *name;
|
|
|
|
for (sig_idx = 0; sig_idx < con->con_out->nr_sigs; sig_idx++) {
|
|
name = cti_sig_type_name(con, sig_idx, false);
|
|
used += sprintf(buf + used, "%s ", name);
|
|
}
|
|
used += sprintf(buf + used, "\n");
|
|
return used;
|
|
}
|
|
|
|
/*
|
|
* Array of show function names declared above to allow selection
|
|
* for the connection attributes
|
|
*/
|
|
static p_show_fn show_fns[CTI_CON_ATTR_MAX] = {
|
|
con_name_show,
|
|
trigin_sig_show,
|
|
trigout_sig_show,
|
|
trigin_type_show,
|
|
trigout_type_show,
|
|
};
|
|
|
|
static int cti_create_con_sysfs_attr(struct device *dev,
|
|
struct cti_trig_con *con,
|
|
enum cti_conn_attr_type attr_type,
|
|
int attr_idx)
|
|
{
|
|
struct dev_ext_attribute *eattr;
|
|
char *name;
|
|
|
|
eattr = devm_kzalloc(dev, sizeof(struct dev_ext_attribute),
|
|
GFP_KERNEL);
|
|
if (eattr) {
|
|
name = devm_kstrdup(dev, con_attr_names[attr_type],
|
|
GFP_KERNEL);
|
|
if (name) {
|
|
/* fill out the underlying attribute struct */
|
|
eattr->attr.attr.name = name;
|
|
eattr->attr.attr.mode = 0444;
|
|
|
|
/* now the device_attribute struct */
|
|
eattr->attr.show = show_fns[attr_type];
|
|
} else {
|
|
return -ENOMEM;
|
|
}
|
|
} else {
|
|
return -ENOMEM;
|
|
}
|
|
eattr->var = con;
|
|
con->con_attrs[attr_idx] = &eattr->attr.attr;
|
|
/*
|
|
* Initialize the dynamically allocated attribute
|
|
* to avoid LOCKDEP splat. See include/linux/sysfs.h
|
|
* for more details.
|
|
*/
|
|
sysfs_attr_init(con->con_attrs[attr_idx]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct attribute_group *
|
|
cti_create_con_sysfs_group(struct device *dev, struct cti_device *ctidev,
|
|
int con_idx, struct cti_trig_con *tc)
|
|
{
|
|
struct attribute_group *group = NULL;
|
|
int grp_idx;
|
|
|
|
group = devm_kzalloc(dev, sizeof(struct attribute_group), GFP_KERNEL);
|
|
if (!group)
|
|
return NULL;
|
|
|
|
group->name = devm_kasprintf(dev, GFP_KERNEL, "triggers%d", con_idx);
|
|
if (!group->name)
|
|
return NULL;
|
|
|
|
grp_idx = con_idx + CORESIGHT_CTI_STATIC_GROUPS_MAX - 1;
|
|
ctidev->con_groups[grp_idx] = group;
|
|
tc->attr_group = group;
|
|
return group;
|
|
}
|
|
|
|
/* create a triggers connection group and the attributes for that group */
|
|
static int cti_create_con_attr_set(struct device *dev, int con_idx,
|
|
struct cti_device *ctidev,
|
|
struct cti_trig_con *tc)
|
|
{
|
|
struct attribute_group *attr_group = NULL;
|
|
int attr_idx = 0;
|
|
int err = -ENOMEM;
|
|
|
|
attr_group = cti_create_con_sysfs_group(dev, ctidev, con_idx, tc);
|
|
if (!attr_group)
|
|
return -ENOMEM;
|
|
|
|
/* allocate NULL terminated array of attributes */
|
|
tc->con_attrs = devm_kcalloc(dev, CTI_CON_ATTR_MAX + 1,
|
|
sizeof(struct attribute *), GFP_KERNEL);
|
|
if (!tc->con_attrs)
|
|
return -ENOMEM;
|
|
|
|
err = cti_create_con_sysfs_attr(dev, tc, CTI_CON_ATTR_NAME,
|
|
attr_idx++);
|
|
if (err)
|
|
return err;
|
|
|
|
if (tc->con_in->nr_sigs > 0) {
|
|
err = cti_create_con_sysfs_attr(dev, tc,
|
|
CTI_CON_ATTR_TRIGIN_SIG,
|
|
attr_idx++);
|
|
if (err)
|
|
return err;
|
|
|
|
err = cti_create_con_sysfs_attr(dev, tc,
|
|
CTI_CON_ATTR_TRIGIN_TYPES,
|
|
attr_idx++);
|
|
if (err)
|
|
return err;
|
|
}
|
|
|
|
if (tc->con_out->nr_sigs > 0) {
|
|
err = cti_create_con_sysfs_attr(dev, tc,
|
|
CTI_CON_ATTR_TRIGOUT_SIG,
|
|
attr_idx++);
|
|
if (err)
|
|
return err;
|
|
|
|
err = cti_create_con_sysfs_attr(dev, tc,
|
|
CTI_CON_ATTR_TRIGOUT_TYPES,
|
|
attr_idx++);
|
|
if (err)
|
|
return err;
|
|
}
|
|
attr_group->attrs = tc->con_attrs;
|
|
return 0;
|
|
}
|
|
|
|
/* create the array of group pointers for the CTI sysfs groups */
|
|
static int cti_create_cons_groups(struct device *dev, struct cti_device *ctidev)
|
|
{
|
|
int nr_groups;
|
|
|
|
/* nr groups = dynamic + static + NULL terminator */
|
|
nr_groups = ctidev->nr_trig_con + CORESIGHT_CTI_STATIC_GROUPS_MAX;
|
|
ctidev->con_groups = devm_kcalloc(dev, nr_groups,
|
|
sizeof(struct attribute_group *),
|
|
GFP_KERNEL);
|
|
if (!ctidev->con_groups)
|
|
return -ENOMEM;
|
|
return 0;
|
|
}
|
|
|
|
int cti_create_cons_sysfs(struct device *dev, struct cti_drvdata *drvdata)
|
|
{
|
|
struct cti_device *ctidev = &drvdata->ctidev;
|
|
int err, con_idx = 0, i;
|
|
struct cti_trig_con *tc;
|
|
|
|
err = cti_create_cons_groups(dev, ctidev);
|
|
if (err)
|
|
return err;
|
|
|
|
/* populate first locations with the static set of groups */
|
|
for (i = 0; i < (CORESIGHT_CTI_STATIC_GROUPS_MAX - 1); i++)
|
|
ctidev->con_groups[i] = coresight_cti_groups[i];
|
|
|
|
/* add dynamic set for each connection */
|
|
list_for_each_entry(tc, &ctidev->trig_cons, node) {
|
|
err = cti_create_con_attr_set(dev, con_idx++, ctidev, tc);
|
|
if (err)
|
|
break;
|
|
}
|
|
return err;
|
|
}
|
|
|
|
/* attribute and group sysfs tables. */
|
|
static const struct attribute_group coresight_cti_group = {
|
|
.attrs = coresight_cti_attrs,
|
|
};
|
|
|
|
static const struct attribute_group coresight_cti_mgmt_group = {
|
|
.attrs = coresight_cti_mgmt_attrs,
|
|
.name = "mgmt",
|
|
};
|
|
|
|
static const struct attribute_group coresight_cti_regs_group = {
|
|
.attrs = coresight_cti_regs_attrs,
|
|
.name = "regs",
|
|
};
|
|
|
|
static const struct attribute_group coresight_cti_channels_group = {
|
|
.attrs = coresight_cti_channel_attrs,
|
|
.name = "channels",
|
|
};
|
|
|
|
const struct attribute_group *
|
|
coresight_cti_groups[CORESIGHT_CTI_STATIC_GROUPS_MAX] = {
|
|
&coresight_cti_group,
|
|
&coresight_cti_mgmt_group,
|
|
&coresight_cti_regs_group,
|
|
&coresight_cti_channels_group,
|
|
NULL,
|
|
};
|