2874c5fd28
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
130 lines
3.0 KiB
C
130 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* phy-mvebu-sata.c: SATA Phy driver for the Marvell mvebu SoCs.
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*
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* Copyright (C) 2013 Andrew Lunn <andrew@lunn.ch>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/phy/phy.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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struct priv {
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struct clk *clk;
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void __iomem *base;
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};
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#define SATA_PHY_MODE_2 0x0330
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#define MODE_2_FORCE_PU_TX BIT(0)
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#define MODE_2_FORCE_PU_RX BIT(1)
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#define MODE_2_PU_PLL BIT(2)
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#define MODE_2_PU_IVREF BIT(3)
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#define SATA_IF_CTRL 0x0050
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#define CTRL_PHY_SHUTDOWN BIT(9)
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static int phy_mvebu_sata_power_on(struct phy *phy)
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{
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struct priv *priv = phy_get_drvdata(phy);
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u32 reg;
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clk_prepare_enable(priv->clk);
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/* Enable PLL and IVREF */
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reg = readl(priv->base + SATA_PHY_MODE_2);
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reg |= (MODE_2_FORCE_PU_TX | MODE_2_FORCE_PU_RX |
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MODE_2_PU_PLL | MODE_2_PU_IVREF);
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writel(reg , priv->base + SATA_PHY_MODE_2);
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/* Enable PHY */
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reg = readl(priv->base + SATA_IF_CTRL);
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reg &= ~CTRL_PHY_SHUTDOWN;
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writel(reg, priv->base + SATA_IF_CTRL);
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clk_disable_unprepare(priv->clk);
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return 0;
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}
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static int phy_mvebu_sata_power_off(struct phy *phy)
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{
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struct priv *priv = phy_get_drvdata(phy);
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u32 reg;
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clk_prepare_enable(priv->clk);
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/* Disable PLL and IVREF */
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reg = readl(priv->base + SATA_PHY_MODE_2);
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reg &= ~(MODE_2_FORCE_PU_TX | MODE_2_FORCE_PU_RX |
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MODE_2_PU_PLL | MODE_2_PU_IVREF);
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writel(reg, priv->base + SATA_PHY_MODE_2);
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/* Disable PHY */
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reg = readl(priv->base + SATA_IF_CTRL);
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reg |= CTRL_PHY_SHUTDOWN;
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writel(reg, priv->base + SATA_IF_CTRL);
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clk_disable_unprepare(priv->clk);
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return 0;
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}
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static const struct phy_ops phy_mvebu_sata_ops = {
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.power_on = phy_mvebu_sata_power_on,
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.power_off = phy_mvebu_sata_power_off,
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.owner = THIS_MODULE,
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};
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static int phy_mvebu_sata_probe(struct platform_device *pdev)
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{
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struct phy_provider *phy_provider;
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struct resource *res;
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struct priv *priv;
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struct phy *phy;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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priv->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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priv->clk = devm_clk_get(&pdev->dev, "sata");
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if (IS_ERR(priv->clk))
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return PTR_ERR(priv->clk);
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phy = devm_phy_create(&pdev->dev, NULL, &phy_mvebu_sata_ops);
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if (IS_ERR(phy))
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return PTR_ERR(phy);
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phy_set_drvdata(phy, priv);
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phy_provider = devm_of_phy_provider_register(&pdev->dev,
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of_phy_simple_xlate);
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if (IS_ERR(phy_provider))
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return PTR_ERR(phy_provider);
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/* The boot loader may of left it on. Turn it off. */
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phy_mvebu_sata_power_off(phy);
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return 0;
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}
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static const struct of_device_id phy_mvebu_sata_of_match[] = {
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{ .compatible = "marvell,mvebu-sata-phy" },
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{ },
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};
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static struct platform_driver phy_mvebu_sata_driver = {
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.probe = phy_mvebu_sata_probe,
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.driver = {
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.name = "phy-mvebu-sata",
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.of_match_table = phy_mvebu_sata_of_match,
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}
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};
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builtin_platform_driver(phy_mvebu_sata_driver);
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