ecc8bc81f2
Provide an accelerated implementation of aegis128 by wiring up the SIMD hooks in the generic driver to an implementation based on NEON intrinsics, which can be compiled to both ARM and arm64 code. This results in a performance of 2.2 cycles per byte on Cortex-A53, which is a performance increase of ~11x compared to the generic code. Reviewed-by: Ondrej Mosnacek <omosnace@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
44 lines
1.1 KiB
C
44 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
|
|
/*
|
|
* Copyright (C) 2019 Linaro Ltd <ard.biesheuvel@linaro.org>
|
|
*/
|
|
|
|
#include <asm/cpufeature.h>
|
|
#include <asm/neon.h>
|
|
|
|
#include "aegis.h"
|
|
|
|
void crypto_aegis128_update_neon(void *state, const void *msg);
|
|
void crypto_aegis128_encrypt_chunk_neon(void *state, void *dst, const void *src,
|
|
unsigned int size);
|
|
void crypto_aegis128_decrypt_chunk_neon(void *state, void *dst, const void *src,
|
|
unsigned int size);
|
|
|
|
bool crypto_aegis128_have_simd(void)
|
|
{
|
|
return cpu_have_feature(cpu_feature(AES));
|
|
}
|
|
|
|
void crypto_aegis128_update_simd(union aegis_block *state, const void *msg)
|
|
{
|
|
kernel_neon_begin();
|
|
crypto_aegis128_update_neon(state, msg);
|
|
kernel_neon_end();
|
|
}
|
|
|
|
void crypto_aegis128_encrypt_chunk_simd(union aegis_block *state, u8 *dst,
|
|
const u8 *src, unsigned int size)
|
|
{
|
|
kernel_neon_begin();
|
|
crypto_aegis128_encrypt_chunk_neon(state, dst, src, size);
|
|
kernel_neon_end();
|
|
}
|
|
|
|
void crypto_aegis128_decrypt_chunk_simd(union aegis_block *state, u8 *dst,
|
|
const u8 *src, unsigned int size)
|
|
{
|
|
kernel_neon_begin();
|
|
crypto_aegis128_decrypt_chunk_neon(state, dst, src, size);
|
|
kernel_neon_end();
|
|
}
|