c8cc58e289
New drivers: - add QAIC acceleration driver dma-buf: - constify kobj_type structs - Reject prime DMA-Buf attachment if get_sg_table is missing. fbdev: - cmdline parser fixes - implement fbdev emulation for GEM DMA drivers - always use shadow buffer in fbdev emulation helpers dma-fence: - add deadline hint to fences - signal private stub fence core: - improve DisplayID 2.0 and EDID parsing - add gem eviction function + callback - prep to convert shmem helper to GEM resv lock - move suballocator from radeon/amdgpu to core for Xe - HPD polling fixes - Documentation improvements - Add atomic enable_plane callback - use tgid instead of pid for client tracking - DP: Add SDP Error Detection Configuration Register - Add prime import/export to vram-helper - use pci aperture helpers in more drivers panel: - Radxa 8/10HD support - Samsung AMD495QA01 support - Elida KD50T048A - Sony TD4353 - Novatek NT36523 - STARRY 2081101QFH032011-53G - B133UAN01.0 - AUO NE135FBM-N41 i915: - More MTL enabling - fix s/r problems with MEI/PXP - Implement fb_dirty for PSR,FBC,DRRS fixes - Fix eDP+DSI dual panel systems - Fix issue #6333: "list_add corruption" and full system lockup from performance monitoring - Don't use stolen memory or BAR for ring buffers on LLC platforms - Make sure DSM size has correct 1MiB granularity on Gen12+ - Whitelist COMMON_SLICE_CHICKEN3 for UMD access on Gen12+ - Add engine TLB invalidation for Meteorlake - Fix GSC races on driver load/unload on Meteorlake+ - Make kobj_type structures constant - Move fd_install after last use of fence - wm/vblank refactoring - display code refactoring - Create GSC submission targeting HDCP and PXP usages on MTL+ - Enable HDCP2.x via GSC CS - Fix context runtime accounting on sysfs fdinfo for heavy workloads - Use i915 instead of dev_priv insied the file_priv structure - Replace fake flex-array with flexible-array member amdgpu: - Make kobj structures const - Generalize dmabuf import to work with KFD - Add capped/uncapped workload handling for supported APUs - Expose additional memory stats via fdinfo - Register vga_switcheroo for apple-gmux - Initial NBIO7.9, GC 9.4.3, GFXHUB 1.2, MMHUB 1.8 support - Initial DC FAM infrastructure - Link DC backlight to connector device rather than PCI device - Add sysfs nodes for secondary VCN clocks amdkfd: - Make kobj structures const - Support for exporting buffers via dmabuf - Multi-VMA page migration fixes - initial GC 9.4.3 support radeon: - iMac fix - convert to client based fbdev emulation habanalabs: - Add opcodes to the CS ioctl to allow user to stall/resume specific engines inside Gaudi2. - INFO ioctl the amount of device memory that the driver and f/w reserve for themselves. - INFO ioctl a bit-mask of the available rotator engines - INFO ioctl the register's address of the f/w that should be used to trigger interrupts - INFO ioctl two new opcodes to fetch information on h/w and f/w events - Enable graceful reset mechanism for compute-reset. - Align to the latest firmware specs. - Enforce the release order of the compute device and dma-buf. msm: - UBWC decoder programming rework - SM8550, SM8450 bindings update - uapi C++ fix - a3xx and a4xx devfreq support - GPU and GEM updates to avoid allocations which could trigger reclaim (shrinker) in fence signaling path - dma-fence deadline hint support and wait-boost - a640/650 speed bin support cirrus: - convert to regular atomic helpers - add damage clipping mediatek: - 10-bit overlay support - mt8195 support - Only trigger DRM HPD events if bridge is attached - Change the aux retries times when receiving AUX_DEFER rockchip: - add 4K support vc4: - use drm_gem_objects virtio: - allow KMS support to be disabled - add damage clipping vmwgfx: - buffer object lifetime fixes exynos: - move MIPI DSI driver to drm bridge for iMX sharing - use kernel fbdev emulation panfrost: - add support for mali MT81xx devices - add speed binning support lima: - add usage stats tegra: - fbdev client conversion vkms: - Add primary plane positioning support -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEEKbZHaGwW9KfbeusDHTzWXnEhr4FAmRGFU4ACgkQDHTzWXnE hr5m4w/9GzutylTH5aY+otFRNR6uKWGJZ9d90RLyLOE3vjE+7/Q/36EXPOjZctVt VgfQD1giKIGD9ENcCfwbw6iwyVAjLvinBr3Hz4NleEu1TjdXPJvgo9OW/+FQKVi6 1vWH/mcnN6o89m3Mme7T2drFtwy3Y6/l5EY18yNyI7XeQVUMaDTr9Lvcriq0Sigc CInYxilIxViKioYZQmHihXPnZ89nNQZweN2GtDu8O9Bw1Z1eEyn0kRzb3px2Zl6T MpQEQasrPDdF3LFlVWs0AlKmLFbhqV9Pq/OPfowfAWT5RSXpeDvO95NaL3EPzFXy AO6jWHR7/VpvWvj4iJ6R35TLgi/CyASxjJ8Cr9k61Sb1U2WthMEmtd1BKBtI5mTq Us7yP2WJle3LXEqXyvDKDGsZf8kOQ4nyJx+3CJof5Tbnzy3hn+JUkTiUweSDQ14x CHEz7TI8WY5G96+zcyBcee0MWa3V6IXH0cjuMMUiSHw1uir34LuyP+plaELp3eqv MFf5WUJEuU9DmDlxRd2W+g6fmKWaEkY2ksWcbD7H3BZrBmnxkS4LIyfC9HJirGCC 4JF4+4k55F/UAzQOi/4hQxulPtQmHug2/9c29IqZerwxekYdMRkb75rIoVf0IfF4 uLexY0u3aO+IKZ7ygSL9MAwAyiJU6ulYigMLxWMjT7vU36CF5Z8= =NUEy -----END PGP SIGNATURE----- Merge tag 'drm-next-2023-04-24' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Dave Airlie: "There is a new Qualcomm accel driver for their QAIC, dma-fence got a deadline feature added, lots of refactoring around fbdev emulation, and the usual pre-release hw enablements from AMD and Intel and fixes everywhere. New drivers: - add QAIC acceleration driver dma-buf: - constify kobj_type structs - Reject prime DMA-Buf attachment if get_sg_table is missing. fbdev: - cmdline parser fixes - implement fbdev emulation for GEM DMA drivers - always use shadow buffer in fbdev emulation helpers dma-fence: - add deadline hint to fences - signal private stub fence core: - improve DisplayID 2.0 and EDID parsing - add gem eviction function + callback - prep to convert shmem helper to GEM resv lock - move suballocator from radeon/amdgpu to core for Xe - HPD polling fixes - Documentation improvements - Add atomic enable_plane callback - use tgid instead of pid for client tracking - DP: Add SDP Error Detection Configuration Register - Add prime import/export to vram-helper - use pci aperture helpers in more drivers panel: - Radxa 8/10HD support - Samsung AMD495QA01 support - Elida KD50T048A - Sony TD4353 - Novatek NT36523 - STARRY 2081101QFH032011-53G - B133UAN01.0 - AUO NE135FBM-N41 i915: - More MTL enabling - fix s/r problems with MEI/PXP - Implement fb_dirty for PSR,FBC,DRRS fixes - Fix eDP+DSI dual panel systems - Fix issue #6333: "list_add corruption" and full system lockup from performance monitoring - Don't use stolen memory or BAR for ring buffers on LLC platforms - Make sure DSM size has correct 1MiB granularity on Gen12+ - Whitelist COMMON_SLICE_CHICKEN3 for UMD access on Gen12+ - Add engine TLB invalidation for Meteorlake - Fix GSC races on driver load/unload on Meteorlake+ - Make kobj_type structures constant - Move fd_install after last use of fence - wm/vblank refactoring - display code refactoring - Create GSC submission targeting HDCP and PXP usages on MTL+ - Enable HDCP2.x via GSC CS - Fix context runtime accounting on sysfs fdinfo for heavy workloads - Use i915 instead of dev_priv insied the file_priv structure - Replace fake flex-array with flexible-array member amdgpu: - Make kobj structures const - Generalize dmabuf import to work with KFD - Add capped/uncapped workload handling for supported APUs - Expose additional memory stats via fdinfo - Register vga_switcheroo for apple-gmux - Initial NBIO7.9, GC 9.4.3, GFXHUB 1.2, MMHUB 1.8 support - Initial DC FAM infrastructure - Link DC backlight to connector device rather than PCI device - Add sysfs nodes for secondary VCN clocks amdkfd: - Make kobj structures const - Support for exporting buffers via dmabuf - Multi-VMA page migration fixes - initial GC 9.4.3 support radeon: - iMac fix - convert to client based fbdev emulation habanalabs: - Add opcodes to the CS ioctl to allow user to stall/resume specific engines inside Gaudi2. - INFO ioctl the amount of device memory that the driver and f/w reserve for themselves. - INFO ioctl a bit-mask of the available rotator engines - INFO ioctl the register's address of the f/w that should be used to trigger interrupts - INFO ioctl two new opcodes to fetch information on h/w and f/w events - Enable graceful reset mechanism for compute-reset. - Align to the latest firmware specs. - Enforce the release order of the compute device and dma-buf. msm: - UBWC decoder programming rework - SM8550, SM8450 bindings update - uapi C++ fix - a3xx and a4xx devfreq support - GPU and GEM updates to avoid allocations which could trigger reclaim (shrinker) in fence signaling path - dma-fence deadline hint support and wait-boost - a640/650 speed bin support cirrus: - convert to regular atomic helpers - add damage clipping mediatek: - 10-bit overlay support - mt8195 support - Only trigger DRM HPD events if bridge is attached - Change the aux retries times when receiving AUX_DEFER rockchip: - add 4K support vc4: - use drm_gem_objects virtio: - allow KMS support to be disabled - add damage clipping vmwgfx: - buffer object lifetime fixes exynos: - move MIPI DSI driver to drm bridge for iMX sharing - use kernel fbdev emulation panfrost: - add support for mali MT81xx devices - add speed binning support lima: - add usage stats tegra: - fbdev client conversion vkms: - Add primary plane positioning support" * tag 'drm-next-2023-04-24' of git://anongit.freedesktop.org/drm/drm: (1495 commits) drm/i915/dp_mst: Fix active port PLL selection for secondary MST streams drm/exynos: Implement fbdev emulation as in-kernel client drm/exynos: Initialize fbdev DRM client drm/exynos: Remove fb_helper from struct exynos_drm_private drm/exynos: Remove struct exynos_drm_fbdev drm/exynos: Remove exynos_gem from struct exynos_drm_fbdev drm/i915: Fix memory leaks in i915 selftests drm/i915: Make intel_get_crtc_new_encoder() less oopsy drm/i915/gt: Avoid out-of-bounds access when loading HuC drm/amdgpu: add some basic elements for multiple XCD case drm/amdgpu: move vmhub out of amdgpu_ring_funcs (v4) Revert "drm/amdgpu: enable ras for mp0 v13_0_10 on SRIOV" drm/amdgpu: add common ip block for GC 9.4.3 drm/amd/display: Add logging when DP link training Clock recovery is Successful drm/amdgpu: add common early init support for GC 9.4.3 drm/amdgpu: switch to v9_4_3 gfx_funcs callbacks for GC 9.4.3 drm/amd/display: Add logging when setting DP sink power state fails drm/amdkfd: Add gfx_target_version for GC 9.4.3 drm/amdkfd: Enable HW_UPDATE_RPTR on GC 9.4.3 drm/amdgpu: reserve the old gc_11_0_*_mes.bin ...
327 lines
7.4 KiB
C
327 lines
7.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2020-2023 Intel Corporation
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*/
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#include <linux/highmem.h>
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#include <linux/moduleparam.h>
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#include <linux/pci.h>
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#include <linux/pm_runtime.h>
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#include <linux/reboot.h>
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#include "vpu_boot_api.h"
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#include "ivpu_drv.h"
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#include "ivpu_hw.h"
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#include "ivpu_fw.h"
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#include "ivpu_ipc.h"
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#include "ivpu_job.h"
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#include "ivpu_mmu.h"
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#include "ivpu_pm.h"
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static bool ivpu_disable_recovery;
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module_param_named_unsafe(disable_recovery, ivpu_disable_recovery, bool, 0644);
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MODULE_PARM_DESC(disable_recovery, "Disables recovery when VPU hang is detected");
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#define PM_RESCHEDULE_LIMIT 5
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static void ivpu_pm_prepare_cold_boot(struct ivpu_device *vdev)
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{
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struct ivpu_fw_info *fw = vdev->fw;
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ivpu_cmdq_reset_all_contexts(vdev);
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ivpu_ipc_reset(vdev);
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ivpu_fw_load(vdev);
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fw->entry_point = fw->cold_boot_entry_point;
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}
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static void ivpu_pm_prepare_warm_boot(struct ivpu_device *vdev)
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{
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struct ivpu_fw_info *fw = vdev->fw;
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struct vpu_boot_params *bp = fw->mem->kvaddr;
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if (!bp->save_restore_ret_address) {
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ivpu_pm_prepare_cold_boot(vdev);
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return;
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}
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ivpu_dbg(vdev, FW_BOOT, "Save/restore entry point %llx", bp->save_restore_ret_address);
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fw->entry_point = bp->save_restore_ret_address;
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}
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static int ivpu_suspend(struct ivpu_device *vdev)
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{
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int ret;
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ret = ivpu_shutdown(vdev);
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if (ret) {
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ivpu_err(vdev, "Failed to shutdown VPU: %d\n", ret);
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return ret;
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}
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return ret;
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}
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static int ivpu_resume(struct ivpu_device *vdev)
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{
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int ret;
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retry:
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ret = ivpu_hw_power_up(vdev);
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if (ret) {
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ivpu_err(vdev, "Failed to power up HW: %d\n", ret);
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return ret;
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}
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ret = ivpu_mmu_enable(vdev);
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if (ret) {
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ivpu_err(vdev, "Failed to resume MMU: %d\n", ret);
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ivpu_hw_power_down(vdev);
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return ret;
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}
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ret = ivpu_boot(vdev);
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if (ret) {
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ivpu_mmu_disable(vdev);
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ivpu_hw_power_down(vdev);
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if (!ivpu_fw_is_cold_boot(vdev)) {
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ivpu_warn(vdev, "Failed to resume the FW: %d. Retrying cold boot..\n", ret);
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ivpu_pm_prepare_cold_boot(vdev);
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goto retry;
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} else {
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ivpu_err(vdev, "Failed to resume the FW: %d\n", ret);
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}
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}
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return ret;
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}
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static void ivpu_pm_recovery_work(struct work_struct *work)
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{
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struct ivpu_pm_info *pm = container_of(work, struct ivpu_pm_info, recovery_work);
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struct ivpu_device *vdev = pm->vdev;
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char *evt[2] = {"IVPU_PM_EVENT=IVPU_RECOVER", NULL};
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int ret;
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retry:
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ret = pci_try_reset_function(to_pci_dev(vdev->drm.dev));
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if (ret == -EAGAIN && !drm_dev_is_unplugged(&vdev->drm)) {
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cond_resched();
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goto retry;
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}
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if (ret && ret != -EAGAIN)
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ivpu_err(vdev, "Failed to reset VPU: %d\n", ret);
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kobject_uevent_env(&vdev->drm.dev->kobj, KOBJ_CHANGE, evt);
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}
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void ivpu_pm_schedule_recovery(struct ivpu_device *vdev)
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{
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struct ivpu_pm_info *pm = vdev->pm;
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if (ivpu_disable_recovery) {
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ivpu_err(vdev, "Recovery not available when disable_recovery param is set\n");
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return;
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}
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if (ivpu_is_fpga(vdev)) {
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ivpu_err(vdev, "Recovery not available on FPGA\n");
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return;
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}
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/* Schedule recovery if it's not in progress */
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if (atomic_cmpxchg(&pm->in_reset, 0, 1) == 0) {
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ivpu_hw_irq_disable(vdev);
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queue_work(system_long_wq, &pm->recovery_work);
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}
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}
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int ivpu_pm_suspend_cb(struct device *dev)
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{
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struct drm_device *drm = dev_get_drvdata(dev);
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struct ivpu_device *vdev = to_ivpu_device(drm);
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unsigned long timeout;
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ivpu_dbg(vdev, PM, "Suspend..\n");
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timeout = jiffies + msecs_to_jiffies(vdev->timeout.tdr);
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while (!ivpu_hw_is_idle(vdev)) {
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cond_resched();
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if (time_after_eq(jiffies, timeout)) {
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ivpu_err(vdev, "Failed to enter idle on system suspend\n");
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return -EBUSY;
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}
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}
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ivpu_suspend(vdev);
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ivpu_pm_prepare_warm_boot(vdev);
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pci_save_state(to_pci_dev(dev));
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pci_set_power_state(to_pci_dev(dev), PCI_D3hot);
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ivpu_dbg(vdev, PM, "Suspend done.\n");
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return 0;
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}
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int ivpu_pm_resume_cb(struct device *dev)
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{
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struct drm_device *drm = dev_get_drvdata(dev);
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struct ivpu_device *vdev = to_ivpu_device(drm);
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int ret;
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ivpu_dbg(vdev, PM, "Resume..\n");
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pci_set_power_state(to_pci_dev(dev), PCI_D0);
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pci_restore_state(to_pci_dev(dev));
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ret = ivpu_resume(vdev);
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if (ret)
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ivpu_err(vdev, "Failed to resume: %d\n", ret);
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ivpu_dbg(vdev, PM, "Resume done.\n");
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return ret;
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}
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int ivpu_pm_runtime_suspend_cb(struct device *dev)
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{
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struct drm_device *drm = dev_get_drvdata(dev);
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struct ivpu_device *vdev = to_ivpu_device(drm);
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int ret;
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ivpu_dbg(vdev, PM, "Runtime suspend..\n");
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if (!ivpu_hw_is_idle(vdev) && vdev->pm->suspend_reschedule_counter) {
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ivpu_dbg(vdev, PM, "Failed to enter idle, rescheduling suspend, retries left %d\n",
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vdev->pm->suspend_reschedule_counter);
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pm_schedule_suspend(dev, vdev->timeout.reschedule_suspend);
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vdev->pm->suspend_reschedule_counter--;
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return -EAGAIN;
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}
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ret = ivpu_suspend(vdev);
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if (ret)
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ivpu_err(vdev, "Failed to set suspend VPU: %d\n", ret);
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if (!vdev->pm->suspend_reschedule_counter) {
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ivpu_warn(vdev, "VPU failed to enter idle, force suspended.\n");
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ivpu_pm_prepare_cold_boot(vdev);
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} else {
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ivpu_pm_prepare_warm_boot(vdev);
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}
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vdev->pm->suspend_reschedule_counter = PM_RESCHEDULE_LIMIT;
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ivpu_dbg(vdev, PM, "Runtime suspend done.\n");
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return 0;
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}
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int ivpu_pm_runtime_resume_cb(struct device *dev)
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{
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struct drm_device *drm = dev_get_drvdata(dev);
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struct ivpu_device *vdev = to_ivpu_device(drm);
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int ret;
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ivpu_dbg(vdev, PM, "Runtime resume..\n");
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ret = ivpu_resume(vdev);
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if (ret)
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ivpu_err(vdev, "Failed to set RESUME state: %d\n", ret);
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ivpu_dbg(vdev, PM, "Runtime resume done.\n");
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return ret;
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}
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int ivpu_rpm_get(struct ivpu_device *vdev)
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{
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int ret;
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ret = pm_runtime_resume_and_get(vdev->drm.dev);
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if (!drm_WARN_ON(&vdev->drm, ret < 0))
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vdev->pm->suspend_reschedule_counter = PM_RESCHEDULE_LIMIT;
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return ret;
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}
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void ivpu_rpm_put(struct ivpu_device *vdev)
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{
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pm_runtime_mark_last_busy(vdev->drm.dev);
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pm_runtime_put_autosuspend(vdev->drm.dev);
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}
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void ivpu_pm_reset_prepare_cb(struct pci_dev *pdev)
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{
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struct ivpu_device *vdev = pci_get_drvdata(pdev);
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pm_runtime_get_sync(vdev->drm.dev);
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ivpu_dbg(vdev, PM, "Pre-reset..\n");
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atomic_set(&vdev->pm->in_reset, 1);
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ivpu_shutdown(vdev);
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ivpu_pm_prepare_cold_boot(vdev);
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ivpu_jobs_abort_all(vdev);
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ivpu_dbg(vdev, PM, "Pre-reset done.\n");
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}
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void ivpu_pm_reset_done_cb(struct pci_dev *pdev)
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{
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struct ivpu_device *vdev = pci_get_drvdata(pdev);
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int ret;
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ivpu_dbg(vdev, PM, "Post-reset..\n");
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ret = ivpu_resume(vdev);
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if (ret)
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ivpu_err(vdev, "Failed to set RESUME state: %d\n", ret);
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atomic_set(&vdev->pm->in_reset, 0);
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ivpu_dbg(vdev, PM, "Post-reset done.\n");
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pm_runtime_put_autosuspend(vdev->drm.dev);
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}
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int ivpu_pm_init(struct ivpu_device *vdev)
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{
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struct device *dev = vdev->drm.dev;
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struct ivpu_pm_info *pm = vdev->pm;
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pm->vdev = vdev;
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pm->suspend_reschedule_counter = PM_RESCHEDULE_LIMIT;
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atomic_set(&pm->in_reset, 0);
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INIT_WORK(&pm->recovery_work, ivpu_pm_recovery_work);
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pm_runtime_use_autosuspend(dev);
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if (ivpu_disable_recovery)
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pm_runtime_set_autosuspend_delay(dev, -1);
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else if (ivpu_is_silicon(vdev))
|
|
pm_runtime_set_autosuspend_delay(dev, 100);
|
|
else
|
|
pm_runtime_set_autosuspend_delay(dev, 60000);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void ivpu_pm_cancel_recovery(struct ivpu_device *vdev)
|
|
{
|
|
cancel_work_sync(&vdev->pm->recovery_work);
|
|
}
|
|
|
|
void ivpu_pm_enable(struct ivpu_device *vdev)
|
|
{
|
|
struct device *dev = vdev->drm.dev;
|
|
|
|
pm_runtime_set_active(dev);
|
|
pm_runtime_allow(dev);
|
|
pm_runtime_mark_last_busy(dev);
|
|
pm_runtime_put_autosuspend(dev);
|
|
}
|
|
|
|
void ivpu_pm_disable(struct ivpu_device *vdev)
|
|
{
|
|
pm_runtime_get_noresume(vdev->drm.dev);
|
|
pm_runtime_forbid(vdev->drm.dev);
|
|
}
|