Vivek Gautam ed692a99f3 usb: dwc3: exynos: Add provision for AXI UpScaler clock on exynos7 ...

DWC3 controller on Exynos7 SoC has separate control for
AXI UpScaler which connects DWC3 DRD controller to AXI bus.
Get the gate clock for the same to control it across power
cycles.

Suggested-by: Anton Tikhomirov <av.tikhomirov@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

2014-11-21 09:07:29 -06:00

..

bindings

usb: dwc3: exynos: Add provision for AXI UpScaler clock on exynos7

2014-11-21 09:07:29 -06:00

00-INDEX

Documentation/: update 00-INDEX files

2014-02-10 16:01:40 -08:00

booting-without-of.txt

dt/documentation: add specification of dma bus information

2014-09-26 11:18:05 -05:00

changesets.txt

of: Transactional DT support.

2014-07-23 17:29:15 -06:00

dynamic-resolution-notes.txt

of: Introduce Device Tree resolve support.

2014-10-04 21:24:26 +01:00

of_selftest.txt

To remove non-ascii characters in of_selftest.txt

2014-10-06 09:52:39 +01:00

todo.txt

of: Add todo tasklist for Devicetree

2014-07-23 17:33:01 -06:00

usage-model.txt

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