043cb41a85
On strict kernel memory permission, we couldn't patch code without writable permission. Preserve two holes in fixmap area, so we can map the kernel code temporarily to fixmap area, then patch the instructions. We need two pages here because we support the compressed instruction, so the instruction might be align to 2 bytes. When patching the 32-bit length instruction which is 2 bytes alignment, it will across two pages. Introduce two interfaces to patch kernel code: riscv_patch_text_nosync: - patch code without synchronization, it's caller's responsibility to synchronize all CPUs if needed. riscv_patch_text: - patch code and always synchronize with stop_machine() Signed-off-by: Zong Li <zong.li@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
50 lines
1.2 KiB
C
50 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2019 Western Digital Corporation or its affiliates.
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*/
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#ifndef _ASM_RISCV_FIXMAP_H
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#define _ASM_RISCV_FIXMAP_H
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#include <linux/kernel.h>
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#include <linux/sizes.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#ifdef CONFIG_MMU
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/*
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* Here we define all the compile-time 'special' virtual addresses.
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* The point is to have a constant address at compile time, but to
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* set the physical address only in the boot process.
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*
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* These 'compile-time allocated' memory buffers are page-sized. Use
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* set_fixmap(idx,phys) to associate physical memory with fixmap indices.
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*/
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enum fixed_addresses {
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FIX_HOLE,
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#define FIX_FDT_SIZE SZ_1M
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FIX_FDT_END,
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FIX_FDT = FIX_FDT_END + FIX_FDT_SIZE / PAGE_SIZE - 1,
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FIX_PTE,
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FIX_PMD,
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FIX_TEXT_POKE1,
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FIX_TEXT_POKE0,
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FIX_EARLYCON_MEM_BASE,
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__end_of_fixed_addresses
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};
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#define FIXMAP_PAGE_IO PAGE_KERNEL
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#define __early_set_fixmap __set_fixmap
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#define __late_set_fixmap __set_fixmap
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#define __late_clear_fixmap(idx) __set_fixmap((idx), 0, FIXMAP_PAGE_CLEAR)
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extern void __set_fixmap(enum fixed_addresses idx,
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phys_addr_t phys, pgprot_t prot);
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#include <asm-generic/fixmap.h>
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#endif /* CONFIG_MMU */
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#endif /* _ASM_RISCV_FIXMAP_H */
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