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Kan Liang ee13938543 perf/x86/intel/uncore: Reduce the number of CBOX counters 
An oops is triggered by the fuzzy test.

[  327.853081] unchecked MSR access error: RDMSR from 0x70c at rIP:
0xffffffffc082c820 (uncore_msr_read_counter+0x10/0x50 [intel_uncore])
[  327.853083] Call Trace:
[  327.853085]  <IRQ>
[  327.853089]  uncore_pmu_event_start+0x85/0x170 [intel_uncore]
[  327.853093]  uncore_pmu_event_add+0x1a4/0x410 [intel_uncore]
[  327.853097]  ? event_sched_in.isra.118+0xca/0x240

There are 2 GP counters for each CBOX, but the current code claims 4
counters. Accessing the invalid registers triggers the oops.

Fixes: 6e394376ee89 ("perf/x86/intel/uncore: Add Intel Icelake uncore support")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200925134905.8839-3-kan.liang@linux.intel.com
2020-09-29 09:57:01 +02:00
..
bts.c
perf/x86: Replace zero-length array with flexible-array
2020-05-19 20:34:16 +02:00
core.c
perf/x86/intel: Support per-thread RDPMC TopDown metrics
2020-08-18 16:34:37 +02:00
cstate.c
perf/x86/cstate: Add Jasper Lake CPU support
2020-04-22 21:43:12 +02:00
ds.c
perf/x86/intel/ds: Fix x86_pmu_stop warning for large PEBS
2020-09-10 11:19:33 +02:00
knc.c
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
2017-11-02 11:10:55 +01:00
lbr.c
perf/x86/intel/lbr: Support XSAVES for arch LBR read
2020-07-08 11:38:57 +02:00
Makefile
perf/x86/rapl: Move RAPL support to common x86 code
2020-05-28 07:58:55 +02:00
p4.c
perf_event: Add support for LSM and SELinux checks
2019-10-17 21:31:55 +02:00
p6.c
x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_stepping
2018-02-15 01:15:52 +01:00
pt.c
perf/x86/intel/pt: Drop pointless NULL assignment.
2020-04-30 20:14:36 +02:00
pt.h
perf/x86/intel/pt: Prevent redundant WRMSRs
2019-11-13 11:06:18 +01:00
uncore_nhmex.c
perf/x86/intel/uncore: Correct fixed counter index check for NHM
2018-05-31 12:36:28 +02:00
uncore_snb.c
perf/x86/intel/uncore: Reduce the number of CBOX counters
2020-09-29 09:57:01 +02:00
uncore_snbep.c
perf/x86/intel/uncore: Support PCIe3 unit on Snow Ridge
2020-09-24 15:55:52 +02:00
uncore.c
perf/x86/intel/uncore: Split the Ice Lake and Tiger Lake MSR uncore support
2020-09-29 09:57:00 +02:00
uncore.h
perf/x86/intel/uncore: Split the Ice Lake and Tiger Lake MSR uncore support
2020-09-29 09:57:00 +02:00