ef833eab1d
With corresponding clk driver now merged upstream, switch to it. - core_clk now represent the PLL (vs. fixed clk before) - input_clk represent the clk signal src for PLL (basically xtal) Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
11 lines
320 B
Plaintext
11 lines
320 B
Plaintext
# Copyright (C) 2017 Synopsys, Inc. (www.synopsys.com)
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License version 2 as
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# published by the Free Software Foundation.
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#
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menuconfig ARC_SOC_HSDK
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bool "ARC HS Development Kit SOC"
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select CLK_HSDK
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