Pierre Gondois ef9f643a9f cacheinfo: Add use_arch[|_cache]_info field/function
The cache information can be extracted from either a Device
Tree (DT), the PPTT ACPI table, or arch registers (clidr_el1
for arm64).

The clidr_el1 register is used only if DT/ACPI information is not
available. It does not states how caches are shared among CPUs.

Add a use_arch_cache_info field/function to identify when the
DT/ACPI doesn't provide cache information. Use this information
to assume L1 caches are privates and L2 and higher are shared among
all CPUs.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Link: https://lore.kernel.org/r/20230414081453.244787-5-pierre.gondois@arm.com
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2023-04-14 10:13:39 +01:00
..
2022-12-19 12:33:32 -06:00
2023-01-22 12:56:55 +01:00
2023-02-24 12:58:55 -08:00
2021-07-21 11:53:42 +02:00
2021-12-30 13:54:42 +01:00
2021-06-15 17:14:36 +02:00
2021-06-15 17:14:36 +02:00