97b7951257
Describe the SGMII/SerDes PHY present on the sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230619091336.194914-3-brgl@bgdev.pl Signed-off-by: Vinod Koul <vkoul@kernel.org>
56 lines
1.1 KiB
YAML
56 lines
1.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm SerDes/SGMII ethernet PHY controller
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maintainers:
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- Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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description:
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The SerDes PHY sits between the MAC and the external PHY and provides
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separate Rx Tx lines.
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properties:
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compatible:
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const: qcom,sa8775p-dwmac-sgmii-phy
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reg:
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items:
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- description: serdes
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clocks:
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maxItems: 1
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clock-names:
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const: sgmi_ref
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phy-supply:
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description:
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Phandle to a regulator that provides power to the PHY.
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"#phy-cells":
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const: 0
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required:
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- compatible
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- reg
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- "#phy-cells"
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,sa8775p-gcc.h>
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serdes_phy: phy@8901000 {
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compatible = "qcom,sa8775p-dwmac-sgmii-phy";
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reg = <0x08901000 0xe10>;
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clocks = <&gcc GCC_SGMI_CLKREF_EN>;
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clock-names = "sgmi_ref";
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#phy-cells = <0>;
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};
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