ec87c99de4
Currently, the macro HAVE_PERF_REGS_SUPPORT is used as a switch to turn on or turn off the code of perf registers. If any architecture cannot support perf register, it disables the perf register parsing, for both the native parsing and cross parsing for other architectures. To support both the native parsing and cross parsing, the tool should always build the perf regs functions. Thus, this patch removes HAVE_PERF_REGS_SUPPORT from the perf regs files. Signed-off-by: Leo Yan <leo.yan@linux.dev> Reviewed-by: Ian Rogers <irogers@google.com> Cc: James Clark <james.clark@arm.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: Guo Ren <guoren@kernel.org> Cc: Will Deacon <will@kernel.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Ming Wang <wangming01@loongson.cn> Cc: John Garry <john.g.garry@oracle.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: linux-csky@vger.kernel.org Cc: linux-riscv@lists.infradead.org Signed-off-by: Namhyung Kim <namhyung@kernel.org> Link: https://lore.kernel.org/r/20240214113947.240957-3-leo.yan@linux.dev
84 lines
1.5 KiB
C
84 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include "../perf_regs.h"
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#include "../../../arch/mips/include/uapi/asm/perf_regs.h"
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const char *__perf_reg_name_mips(int id)
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{
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switch (id) {
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case PERF_REG_MIPS_PC:
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return "PC";
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case PERF_REG_MIPS_R1:
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return "$1";
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case PERF_REG_MIPS_R2:
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return "$2";
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case PERF_REG_MIPS_R3:
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return "$3";
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case PERF_REG_MIPS_R4:
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return "$4";
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case PERF_REG_MIPS_R5:
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return "$5";
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case PERF_REG_MIPS_R6:
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return "$6";
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case PERF_REG_MIPS_R7:
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return "$7";
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case PERF_REG_MIPS_R8:
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return "$8";
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case PERF_REG_MIPS_R9:
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return "$9";
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case PERF_REG_MIPS_R10:
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return "$10";
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case PERF_REG_MIPS_R11:
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return "$11";
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case PERF_REG_MIPS_R12:
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return "$12";
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case PERF_REG_MIPS_R13:
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return "$13";
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case PERF_REG_MIPS_R14:
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return "$14";
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case PERF_REG_MIPS_R15:
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return "$15";
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case PERF_REG_MIPS_R16:
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return "$16";
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case PERF_REG_MIPS_R17:
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return "$17";
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case PERF_REG_MIPS_R18:
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return "$18";
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case PERF_REG_MIPS_R19:
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return "$19";
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case PERF_REG_MIPS_R20:
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return "$20";
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case PERF_REG_MIPS_R21:
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return "$21";
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case PERF_REG_MIPS_R22:
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return "$22";
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case PERF_REG_MIPS_R23:
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return "$23";
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case PERF_REG_MIPS_R24:
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return "$24";
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case PERF_REG_MIPS_R25:
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return "$25";
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case PERF_REG_MIPS_R28:
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return "$28";
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case PERF_REG_MIPS_R29:
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return "$29";
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case PERF_REG_MIPS_R30:
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return "$30";
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case PERF_REG_MIPS_R31:
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return "$31";
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default:
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break;
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}
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return NULL;
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}
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uint64_t __perf_reg_ip_mips(void)
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{
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return PERF_REG_MIPS_PC;
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}
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uint64_t __perf_reg_sp_mips(void)
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{
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return PERF_REG_MIPS_R29;
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}
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