f1c4d157ab
The order in which we store the engines inside default_engines() for the legacy ctx->engines[] has to match the legacy I915_EXEC_RING selector mapping in execbuf::user_map. If we present VCS2 as being the second instance of the video engine, legacy userspace calls that I915_EXEC_BSD2 and so we need to insert it into the second video slot. v2: Record the legacy mapping (hopefully we can remove this need in the future) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111328 Fixes: 2edda80db3d0 ("drm/i915: Rename engines to match their user interface") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> #v1 Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190808110612.23539-2-chris@chris-wilson.co.uk
35 lines
723 B
C
35 lines
723 B
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2018 Intel Corporation
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*/
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#include "igt_gem_utils.h"
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#include "gem/i915_gem_context.h"
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#include "gem/i915_gem_pm.h"
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#include "gt/intel_context.h"
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#include "i915_request.h"
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struct i915_request *
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igt_request_alloc(struct i915_gem_context *ctx, struct intel_engine_cs *engine)
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{
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struct intel_context *ce;
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struct i915_request *rq;
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/*
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* Pinning the contexts may generate requests in order to acquire
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* GGTT space, so do this first before we reserve a seqno for
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* ourselves.
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*/
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ce = i915_gem_context_get_engine(ctx, engine->legacy_idx);
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if (IS_ERR(ce))
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return ERR_CAST(ce);
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rq = intel_context_create_request(ce);
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intel_context_put(ce);
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return rq;
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}
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